163 lines
6.7 KiB
C
163 lines
6.7 KiB
C
/*******************************************************************
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* (c) Copyright 2011-2012 Discretix Technologies Ltd. *
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* This software is protected by copyright, international *
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* treaties and patents, and distributed under multiple licenses. *
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* Any use of this Software as part of the Discretix CryptoCell or *
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* Packet Engine products requires a commercial license. *
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* Copies of this Software that are distributed with the Discretix *
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* CryptoCell or Packet Engine product drivers, may be used in *
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* accordance with a commercial license, or at the user's option, *
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* used and redistributed under the terms and conditions of the GNU *
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* General Public License ("GPL") version 2, as published by the *
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* Free Software Foundation. *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY LIABILITY AND WARRANTY; without even the implied *
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. *
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* See the GNU General Public License version 2 for more details. *
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* You should have received a copy of the GNU General Public *
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* License version 2 along with this Software; if not, please write *
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* to the Free Software Foundation, Inc., 59 Temple Place - Suite *
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* 330, Boston, MA 02111-1307, USA. *
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* Any copy or reproduction of this Software, as permitted under *
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* the GNU General Public License version 2, must include this *
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* Copyright Notice as well as any other notices provided under *
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* the said license. *
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********************************************************************/
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/*!
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* \file dx_cc_regs.h
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* \brief Macro definitions for accessing Dx CryptoCell register space
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*
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* For SeP code define DX_CC_SEP
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* For Host physical/direct registers access define DX_CC_HOST
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* For Host virtual mapping of registers define DX_CC_HOST_VIRT
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*/
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#ifndef _DX_CC_REGS_H_
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#define _DX_CC_REGS_H_
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#include "dx_bitops.h"
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/* Include register base addresses data */
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#if defined(DX_CC_SEP)
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#include "dx_reg_base_sep.h"
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#elif defined(DX_CC_HOST) || defined(DX_CC_HOST_VIRT) || defined(DX_CC_TEE)
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#include "dx_reg_base_host.h"
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#else
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#error Define either DX_CC_SEP or DX_CC_HOST or DX_CC_HOST_VIRT
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#endif
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/* CC registers address calculation */
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#if defined(DX_CC_SEP)
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#define DX_CC_REG_ADDR(unit_name, reg_name) \
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(DX_BASE_CC_PERIF + DX_BASE_ ## unit_name + \
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DX_ ## reg_name ## _REG_OFFSET)
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/* In host macros we ignore the unit_name because all offsets are from base */
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#elif defined(DX_CC_HOST)
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#define DX_CC_REG_ADDR(unit_name, reg_name) \
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(DX_BASE_CC + DX_ ## reg_name ## _REG_OFFSET)
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#elif defined(DX_CC_TEE)
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#define DX_CC_REG_ADDR(unit_name, reg_name) \
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(DX_BASE_CC + DX_ ## reg_name ## _REG_OFFSET)
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#elif defined(DX_CC_HOST_VIRT)
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#define DX_CC_REG_ADDR(cc_base_virt, unit_name, reg_name) \
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(((unsigned long)(cc_base_virt)) + DX_ ## reg_name ## _REG_OFFSET)
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#endif
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/* Register Offset macros (from registers base address in host) */
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#if defined(DX_CC_HOST) || defined(DX_CC_HOST_VIRT)
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#define DX_CC_REG_OFFSET(reg_domain, reg_name) \
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(DX_ ## reg_domain ## _ ## reg_name ## _REG_OFFSET)
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/* Indexed GPR offset macros - note the (not original) preprocessor tricks...*/
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/* (Using the macro without the "_" prefix is allowed with another macro *
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* as the gpr_idx) */
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#define _SEP_HOST_GPR_REG_OFFSET(gpr_idx) \
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DX_CC_REG_OFFSET(HOST, SEP_HOST_GPR ## gpr_idx)
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#define SEP_HOST_GPR_REG_OFFSET(gpr_idx) _SEP_HOST_GPR_REG_OFFSET(gpr_idx)
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#define _HOST_SEP_GPR_REG_OFFSET(gpr_idx) \
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DX_CC_REG_OFFSET(HOST, HOST_SEP_GPR ## gpr_idx)
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#define HOST_SEP_GPR_REG_OFFSET(gpr_idx) _HOST_SEP_GPR_REG_OFFSET(gpr_idx)
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/* GPR IRQ bit mask by GPR index */
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#define _SEP_HOST_GPR_IRQ_MASK(gpr_idx) \
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(1 << DX_HOST_IRR_SEP_HOST_GPR ## gpr_idx ## _INT_BIT_SHIFT)
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#define SEP_HOST_GPR_IRQ_MASK(gpr_idx) _SEP_HOST_GPR_IRQ_MASK(gpr_idx)
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#elif defined(DX_CC_SEP)
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#define DX_CC_REG_OFFSET(unit_name, reg_name) \
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(DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
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/* Indexed GPR address macros - note the (not original) preprocessor tricks...*/
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/* (Using the macro without the "_" prefix is allowed with another macro *
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* as the gpr_idx) */
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#define _SEP_HOST_GPR_REG_ADDR(gpr_idx) \
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DX_CC_REG_ADDR(SEP_RGF, SEP_SEP_HOST_GPR ## gpr_idx)
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#define SEP_HOST_GPR_REG_ADDR(gpr_idx) _SEP_HOST_GPR_REG_ADDR(gpr_idx)
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#define _HOST_SEP_GPR_REG_ADDR(gpr_idx) \
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DX_CC_REG_ADDR(SEP_RGF, SEP_HOST_SEP_GPR ## gpr_idx)
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#define HOST_SEP_GPR_REG_ADDR(gpr_idx) _HOST_SEP_GPR_REG_ADDR(gpr_idx)
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#elif defined(DX_CC_TEE)
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#define DX_CC_REG_OFFSET(unit_name, reg_name) \
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(DX_BASE_ ## unit_name + DX_ ## reg_name ## _REG_OFFSET)
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#else
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#error "Undef exec domain,not DX_CC_SEP, DX_CC_HOST, DX_CC_HOST_VIRT, DX_CC_TEE"
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#endif
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/* Registers address macros for ENV registers (development FPGA only) */
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#ifdef DX_BASE_ENV_REGS
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#if defined(DX_CC_HOST)
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#define DX_ENV_REG_ADDR(reg_name) \
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(DX_BASE_ENV_REGS + DX_ENV_ ## reg_name ## _REG_OFFSET)
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#elif defined(DX_CC_HOST_VIRT)
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/* The OS driver resource address space covers the ENV registers, too */
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/* Since DX_BASE_ENV_REGS is given in absolute address, we calc. the distance */
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#define DX_ENV_REG_ADDR(cc_base_virt, reg_name) \
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(((cc_base_virt) + (DX_BASE_ENV_REGS - DX_BASE_CC)) + \
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DX_ENV_ ## reg_name ## _REG_OFFSET)
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#endif
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#endif /*DX_BASE_ENV_REGS */
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/* Bit fields access */
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#define DX_CC_REG_FLD_GET(unit_name, reg_name, fld_name, reg_val) \
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(DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20 ? \
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reg_val /* Optimization for 32b fields */ : \
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BITFIELD_GET(reg_val, DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
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DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
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#define DX_CC_REG_FLD_SET( \
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unit_name, reg_name, fld_name, reg_shadow_var, new_fld_val) \
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do { \
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if (DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE == 0x20) \
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reg_shadow_var = new_fld_val; /* Optimization for 32b fields */\
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else \
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BITFIELD_SET(reg_shadow_var, \
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DX_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
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DX_ ## reg_name ## _ ## fld_name ## _BIT_SIZE, \
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new_fld_val); \
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} while (0)
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/* Usage example:
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u32 reg_shadow = READ_REGISTER(DX_CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
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DX_CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
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DX_CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
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WRITE_REGISTER(DX_CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
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*/
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#endif /*_DX_CC_REGS_H_*/
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