557 lines
39 KiB
C
557 lines
39 KiB
C
/*COPYRIGHT**
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* -------------------------------------------------------------------------
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* INTEL CORPORATION PROPRIETARY INFORMATION
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* This software is supplied under the terms of the accompanying license
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* agreement or nondisclosure agreement with Intel Corporation and may not
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* be copied or disclosed except in accordance with the terms of that
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* agreement.
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* Copyright (C) 2007-2014 Intel Corporation. All Rights Reserved.
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* -------------------------------------------------------------------------
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**COPYRIGHT*/
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#ifndef _LWPMUDRV_IOCTL_H_
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#define _LWPMUDRV_IOCTL_H_
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#if defined(__cplusplus)
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extern "C" {
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#endif
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//SEP Driver Operation defines
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//
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#define DRV_OPERATION_START 1
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#define DRV_OPERATION_STOP 2
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#define DRV_OPERATION_INIT_PMU 3
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#define DRV_OPERATION_INIT 4
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#define DRV_OPERATION_EM_GROUPS 5
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#define DRV_OPERATION_SET_CPU_MASK 17
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#define DRV_OPERATION_PCI_READ 18
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#define DRV_OPERATION_PCI_WRITE 19
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#define DRV_OPERATION_READ_PCI_CONFIG 20
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#define DRV_OPERATION_FD_PHYS 21
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#define DRV_OPERATION_WRITE_PCI_CONFIG 22
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#define DRV_OPERATION_INSERT_MARKER 23
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#define DRV_OPERATION_GET_NORMALIZED_TSC 24
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#define DRV_OPERATION_EM_CONFIG_NEXT 25
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#if defined(DRV_OS_WINDOWS)
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#define DRV_OPERATION_NUM_CORES 26
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#define DRV_OPERATION_TSC_SKEW_INFO 27
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#define DRV_OPERATION_PAUSE 28
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#define DRV_OPERATION_RESUME 29
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#define DRV_OPERATION_SET_ASYNC_EVENT 30
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#define DRV_OPERATION_ASYNC_STOP 31
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#define DRV_OPERATION_COLLECT_SYS_CONFIG 32
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#define DRV_OPERATION_GET_SYS_CONFIG 33
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#else
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#define DRV_OPERATION_SYS_CONFIG 26
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#define DRV_OPERATION_TSC_SKEW_INFO 27
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#define DRV_OPERATION_NUM_CORES 28
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#define DRV_OPERATION_COLLECT_SYS_CONFIG 29
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#define DRV_OPERATION_GET_SYS_CONFIG 30
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#define DRV_OPERATION_PAUSE 31
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#define DRV_OPERATION_RESUME 32
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#define DRV_OPERATION_SET_ASYNC_EVENT 33
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#define DRV_OPERATION_ASYNC_STOP 34
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#endif
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#define DRV_OPERATION_TERMINATE 35
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#define DRV_OPERATION_READ_MSRS 36
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#define DRV_OPERATION_LBR_INFO 37
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#define DRV_OPERATION_RESERVE 38
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#define DRV_OPERATION_MARK 39
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#define DRV_OPERATION_AWAIT_STOP 40
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#define DRV_OPERATION_SEED_NAME 41
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#define DRV_OPERATION_KERNEL_CS 42
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#define DRV_OPERATION_SET_UID 43
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#define DRV_OPERATION_VERSION 51
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#define DRV_OPERATION_CHIPSET_INIT 52
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#define DRV_OPERATION_GET_CHIPSET_DEVICE_ID 53
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#define DRV_OPERATION_SWITCH_GROUP 54
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#define DRV_OPERATION_GET_NUM_CORE_CTRS 55
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#define DRV_OPERATION_PWR_INFO 56
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#define DRV_OPERATION_NUM_DESCRIPTOR 57
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#define DRV_OPERATION_DESC_NEXT 58
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#define DRV_OPERATION_MARK_OFF 59
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#define DRV_OPERATION_CREATE_MARKER 60
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#define DRV_OPERATION_GET_DRIVER_STATE 61
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#define DRV_OPERATION_READ_SWITCH_GROUP 62
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#define DRV_OPERATION_EM_GROUPS_UNC 63
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#define DRV_OPERATION_EM_CONFIG_NEXT_UNC 64
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#define DRV_OPERATION_INIT_UNC 65
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#define DRV_OPERATION_RO_INFO 66
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#define DRV_OPERATION_READ_MSR 67
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#define DRV_OPERATION_WRITE_MSR 68
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#define DRV_OPERATION_THREAD_SET_NAME 69
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#define DRV_OPERATION_GET_PLATFORM_INFO 70
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#define DRV_OPERATION_GET_NORMALIZED_TSC_STANDALONE 71
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#define DRV_OPERATION_READ_AND_RESET 72
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#define DRV_OPERATION_SET_CPU_TOPOLOGY 73
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#define DRV_OPERATION_INIT_NUM_DEV 74
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#define DRV_OPERATION_SET_GFX_EVENT 75
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#define DRV_OPERATION_GET_NUM_SAMPLES 76
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#define DRV_OPERATION_SET_PWR_EVENT 77
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#define DRV_OPERATION_SET_DEVICE_NUM_UNITS 78
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#define DRV_OPERATION_TIMER_TRIGGER_READ 79
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#define DRV_OPERATION_GET_INTERVAL_COUNTS 80
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#define DRV_OPERATION_FLUSH 81
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#define DRV_OPERATION_SET_SCAN_UNCORE_TOPOLOGY_INFO 82
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#define DRV_OPERATION_GET_UNCORE_TOPOLOGY 83
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// IOCTL_SETUP
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//
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#if defined(DRV_OS_WINDOWS)
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//
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// NtDeviceIoControlFile IoControlCode values for this device.
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//
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// Warning: Remember that the low two bits of the code specify how the
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// buffers are passed to the driver!
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//
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// 16 bit device type. 12 bit function codes
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#define LWPMUDRV_IOCTL_DEVICE_TYPE 0xA000 // values 0-32768 reserved for Microsoft
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#define LWPMUDRV_IOCTL_FUNCTION 0x0A00 // values 0-2047 reserved for Microsoft
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//
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// Basic CTL CODE macro to reduce typographical errors
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// Use for FILE_READ_ACCESS
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//
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#define LWPMUDRV_CTL_READ_CODE(x) CTL_CODE(LWPMUDRV_IOCTL_DEVICE_TYPE, \
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LWPMUDRV_IOCTL_FUNCTION+(x), \
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METHOD_BUFFERED, \
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FILE_READ_ACCESS)
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#define LWPMUDRV_IOCTL_START LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_START)
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#define LWPMUDRV_IOCTL_STOP LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_STOP)
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#define LWPMUDRV_IOCTL_INIT_PMU LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_INIT_PMU)
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#define LWPMUDRV_IOCTL_INIT LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_INIT)
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#define LWPMUDRV_IOCTL_EM_GROUPS LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_EM_GROUPS)
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#define LWPMUDRV_IOCTL_SET_CPU_MASK LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SET_CPU_MASK)
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#define LWPMUDRV_IOCTL_PCI_READ LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_PCI_READ)
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#define LWPMUDRV_IOCTL_PCI_WRITE LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_PCI_WRITE)
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#define LWPMUDRV_IOCTL_READ_PCI_CONFIG LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_READ_PCI_CONFIG)
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#define LWPMUDRV_IOCTL_FD_PHYS LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_FD_PHYS)
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#define LWPMUDRV_IOCTL_WRITE_PCI_CONFIG LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_WRITE_PCI_CONFIG)
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#define LWPMUDRV_IOCTL_INSERT_MARKER LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_INSERT_MARKER)
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#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_NORMALIZED_TSC)
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#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_EM_CONFIG_NEXT)
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#define LWPMUDRV_IOCTL_NUM_CORES LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_NUM_CORES)
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#define LWPMUDRV_IOCTL_TSC_SKEW_INFO LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_TSC_SKEW_INFO)
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#define LWPMUDRV_IOCTL_PAUSE LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_PAUSE)
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#define LWPMUDRV_IOCTL_RESUME LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_RESUME)
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#define LWPMUDRV_IOCTL_SET_ASYNC_EVENT LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SET_ASYNC_EVENT)
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#define LWPMUDRV_IOCTL_ASYNC_STOP LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_ASYNC_STOP)
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#define LWPMUDRV_IOCTL_COLLECT_SYS_CONFIG LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_COLLECT_SYS_CONFIG)
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#define LWPMUDRV_IOCTL_GET_SYS_CONFIG LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_SYS_CONFIG)
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#define LWPMUDRV_IOCTL_TERMINATE LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_TERMINATE)
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#define LWPMUDRV_IOCTL_READ_MSRS LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_READ_MSRS)
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#define LWPMUDRV_IOCTL_LBR_INFO LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_LBR_INFO)
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#define LWPMUDRV_IOCTL_RESERVE LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_RESERVE)
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#define LWPMUDRV_IOCTL_MARK LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_MARK)
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#define LWPMUDRV_IOCTL_SEED_NAME LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SEED_NAME)
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#define LWPMUDRV_IOCTL_VERSION LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_VERSION)
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#define LWPMUDRV_IOCTL_CHIPSET_INIT LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_CHIPSET_INIT)
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#define LWPMUDRV_IOCTL_GET_CHIPSET_DEVICE_ID LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_CHIPSET_DEVICE_ID)
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#define LWPMUDRV_IOCTL_SWITCH_GROUP LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SWITCH_GROUP)
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#define LWPMUDRV_IOCTL_GET_NUM_CORE_CTRS LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_NUM_CORE_CTRS)
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#define LWPMUDRV_IOCTL_PWR_INFO LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_PWR_INFO)
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#define LWPMUDRV_IOCTL_NUM_DESCRIPTOR LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_NUM_DESCRIPTOR)
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#define LWPMUDRV_IOCTL_DESC_NEXT LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_DESC_NEXT)
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#define LWPMUDRV_IOCTL_MARK_OFF LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_MARK_OFF)
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#define LWPMUDRV_IOCTL_CREATE_MARKER LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_CREATE_MARKER)
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#define LWPMUDRV_IOCTL_GET_DRIVER_STATE LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_DRIVER_STATE)
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#define LWPMUDRV_IOCTL_READ_SWITCH_GROUP LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_READ_SWITCH_GROUP)
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#define LWPMUDRV_IOCTL_EM_GROUPS_UNC LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_EM_GROUPS_UNC)
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#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT_UNC LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_EM_CONFIG_NEXT_UNC)
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#define LWPMUDRV_IOCTL_INIT_UNC LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_INIT_UNC)
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#define LWPMUDRV_IOCTL_READ_MSR LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_READ_MSR)
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#define LWPMUDRV_IOCTL_WRITE_MSR LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_WRITE_MSR)
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#define LWPMUDRV_IOCTL_THREAD_SET_NAME LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_THREAD_SET_NAME)
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#define LWPMUDRV_IOCTL_GET_PLATFORM_INFO LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_PLATFORM_INFO)
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#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC_STANDALONE LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_NORMALIZED_TSC_STANDALONE)
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#define LWPMUDRV_IOCTL_READ_AND_RESET LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_READ_AND_RESET)
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#define LWPMUDRV_IOCTL_SET_CPU_TOPOLOGY LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SET_CPU_TOPOLOGY)
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#define LWPMUDRV_IOCTL_INIT_NUM_DEV LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_INIT_NUM_DEV)
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#define LWPMUDRV_IOCTL_SET_GFX_EVENT LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SET_GFX_EVENT)
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#define LWPMUDRV_IOCTL_GET_NUM_SAMPLES LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_NUM_SAMPLES)
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#define LWPMUDRV_IOCTL_SET_PWR_EVENT LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SET_PWR_EVENT)
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#define LWPMUDRV_IOCTL_SET_DEVICE_NUM_UNITS LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SET_DEVICE_NUM_UNITS)
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#define LWPMUDRV_IOCTL_TIMER_TRIGGER_READ LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_TIMER_TRIGGER_READ)
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#define LWPMUDRV_IOCTL_GET_INTERVAL_COUNTS LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_INTERVAL_COUNTS)
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#define LWPMUDRV_IOCTL_FLUSH LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_FLUSH)
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#define LWPMUDRV_IOCTL_SET_SCAN_UNCORE_TOPOLOGY_INFO LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_SET_SCAN_UNCORE_TOPOLOGY_INFO)
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#define LWPMUDRV_IOCTL_GET_UNCORE_TOPOLOGY LWPMUDRV_CTL_READ_CODE(DRV_OPERATION_GET_UNCORE_TOPOLOGY)
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#elif defined(DRV_OS_LINUX) || defined(DRV_OS_SOLARIS) || defined (DRV_OS_ANDROID)
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// IOCTL_ARGS
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typedef struct IOCTL_ARGS_NODE_S IOCTL_ARGS_NODE;
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typedef IOCTL_ARGS_NODE *IOCTL_ARGS;
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#if defined(DRV_EM64T)
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struct IOCTL_ARGS_NODE_S {
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U64 r_len;
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char *r_buf;
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U64 w_len;
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char *w_buf;
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};
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#endif
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#if defined(DRV_IA32)
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struct IOCTL_ARGS_NODE_S {
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U64 r_len;
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char *r_buf;
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char *r_reserved;
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U64 w_len;
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char *w_buf;
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char *w_reserved;
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};
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#endif
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// COMPAT IOCTL_ARGS
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#if defined (CONFIG_COMPAT) && defined(DRV_EM64T)
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typedef struct IOCTL_COMPAT_ARGS_NODE_S IOCTL_COMPAT_ARGS_NODE;
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typedef IOCTL_COMPAT_ARGS_NODE *IOCTL_COMPAT_ARGS;
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struct IOCTL_COMPAT_ARGS_NODE_S {
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U64 r_len;
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compat_uptr_t r_buf;
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U64 w_len;
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compat_uptr_t w_buf;
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};
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#endif
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// COMPAT IOCTL_SETUP
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//
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#define LWPMU_IOC_MAGIC 99
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#if defined (CONFIG_COMPAT) && defined(DRV_EM64T)
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#define LWPMUDRV_IOCTL_COMPAT_INIT_PMU _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_PMU, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_INIT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_EM_GROUPS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_GROUPS, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SET_CPU_MASK _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_CPU_MASK, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_PCI_READ _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PCI_READ, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_PCI_WRITE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PCI_WRITE, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_READ_PCI_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_PCI_CONFIG, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_FD_PHYS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_FD_PHYS, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_WRITE_PCI_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_WRITE_PCI_CONFIG, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_INSERT_MARKER _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INSERT_MARKER, int)
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#define LWPMUDRV_IOCTL_COMPAT_EM_CONFIG_NEXT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_CONFIG_NEXT, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SYS_CONFIG _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_SYS_CONFIG, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_TSC_SKEW_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_TSC_SKEW_INFO, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_NUM_CORES _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_NUM_CORES, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_COLLECT_SYS_CONFIG _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_COLLECT_SYS_CONFIG, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_SYS_CONFIG _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_SYS_CONFIG, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SET_ASYNC_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_ASYNC_EVENT, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_READ_MSRS _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_MSRS, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_LBR_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_LBR_INFO, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_RESERVE _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_RESERVE, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_MARK _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_MARK, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_AWAIT_STOP _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_AWAIT_STOP, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_KERNEL_CS _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_KERNEL_CS, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_VERSION _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_VERSION, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_CHIPSET_INIT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_CHIPSET_INIT, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_CHIPSET_DEVICE_ID _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_CHIPSET_DEVICE_ID, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_NUM_CORE_CTRS _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NUM_CORE_CTRS, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_PWR_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PWR_INFO, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_NUM_DESCRIPTOR _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_NUM_DESCRIPTOR, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_DESC_NEXT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_DESC_NEXT, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_MARK_OFF _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_MARK_OFF, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_CREATE_MARKER _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_CREATE_MARKER, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_DRIVER_STATE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_DRIVER_STATE, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_READ_SWITCH_GROUP _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_SWITCH_GROUP, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_EM_GROUPS_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_GROUPS_UNC, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_EM_CONFIG_NEXT_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_CONFIG_NEXT_UNC, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_INIT_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_UNC, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_RO_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_RO_INFO, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_READ_MSR _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_MSR, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_WRITE_MSR _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_WRITE_MSR, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_THREAD_SET_NAME _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_THREAD_SET_NAME, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_PLATFORM_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_PLATFORM_INFO, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_NORMALIZED_TSC_STANDALONE _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NORMALIZED_TSC_STANDALONE, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_READ_AND_RESET _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_AND_RESET, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SET_CPU_TOPOLOGY _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_CPU_TOPOLOGY, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_INIT_NUM_DEV _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_NUM_DEV, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SET_GFX_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_GFX_EVENT, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_NUM_SAMPLES _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NUM_SAMPLES, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SET_PWR_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_PWR_EVENT, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SET_DEVICE_NUM_UNITS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_DEVICE_NUM_UNITS, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_INTERVAL_COUNTS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_INTERVAL_COUNTS, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_FLUSH _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_FLUSH, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_SET_SCAN_UNCORE_TOPOLOGY_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_SCAN_UNCORE_TOPOLOGY_INFO, compat_uptr_t)
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#define LWPMUDRV_IOCTL_COMPAT_GET_UNCORE_TOPOLOGY _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_UNCORE_TOPOLOGY, compat_uptr_t)
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#endif
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#define LWPMUDRV_IOCTL_START _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_START)
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#define LWPMUDRV_IOCTL_STOP _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_STOP)
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#define LWPMUDRV_IOCTL_INIT_PMU _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_PMU, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_INIT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_EM_GROUPS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_GROUPS, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SET_CPU_MASK _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_CPU_MASK, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_PCI_READ _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PCI_READ, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_PCI_WRITE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PCI_WRITE, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_READ_PCI_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_PCI_CONFIG, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_FD_PHYS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_FD_PHYS, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_WRITE_PCI_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_WRITE_PCI_CONFIG, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_INSERT_MARKER _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INSERT_MARKER, int)
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#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NORMALIZED_TSC, int)
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#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_CONFIG_NEXT, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SYS_CONFIG _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_SYS_CONFIG, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_TSC_SKEW_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_TSC_SKEW_INFO, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_NUM_CORES _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_NUM_CORES, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_COLLECT_SYS_CONFIG _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_COLLECT_SYS_CONFIG, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_GET_SYS_CONFIG _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_SYS_CONFIG, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_PAUSE _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_PAUSE)
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#define LWPMUDRV_IOCTL_RESUME _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_RESUME)
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#define LWPMUDRV_IOCTL_SET_ASYNC_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_ASYNC_EVENT, void* )
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#define LWPMUDRV_IOCTL_ASYNC_STOP _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_ASYNC_STOP)
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#define LWPMUDRV_IOCTL_TERMINATE _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_TERMINATE)
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#define LWPMUDRV_IOCTL_READ_MSRS _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_MSRS, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_LBR_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_LBR_INFO, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_RESERVE _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_RESERVE, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_MARK _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_MARK, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_AWAIT_STOP _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_AWAIT_STOP, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_KERNEL_CS _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_KERNEL_CS, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SET_UID _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_UID, uid_t)
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#define LWPMUDRV_IOCTL_VERSION _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_VERSION, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_CHIPSET_INIT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_CHIPSET_INIT, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_GET_CHIPSET_DEVICE_ID _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_CHIPSET_DEVICE_ID, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SWITCH_GROUP _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_SWITCH_GROUP)
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#define LWPMUDRV_IOCTL_GET_NUM_CORE_CTRS _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NUM_CORE_CTRS, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_PWR_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PWR_INFO, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_NUM_DESCRIPTOR _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_NUM_DESCRIPTOR, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_DESC_NEXT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_DESC_NEXT, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_MARK_OFF _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_MARK_OFF, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_CREATE_MARKER _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_CREATE_MARKER, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_GET_DRIVER_STATE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_DRIVER_STATE, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_READ_SWITCH_GROUP _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_SWITCH_GROUP, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_EM_GROUPS_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_GROUPS_UNC, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_CONFIG_NEXT_UNC, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_INIT_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_UNC, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_RO_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_RO_INFO, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_READ_MSR _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_MSR, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_WRITE_MSR _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_WRITE_MSR, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_THREAD_SET_NAME _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_THREAD_SET_NAME, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_GET_PLATFORM_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_PLATFORM_INFO, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC_STANDALONE _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NORMALIZED_TSC_STANDALONE, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_READ_AND_RESET _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_AND_RESET, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SET_CPU_TOPOLOGY _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_CPU_TOPOLOGY, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_INIT_NUM_DEV _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_NUM_DEV, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SET_GFX_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_GFX_EVENT, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_GET_NUM_SAMPLES _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NUM_SAMPLES, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SET_PWR_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_PWR_EVENT, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SET_DEVICE_NUM_UNITS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_DEVICE_NUM_UNITS, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_TIMER_TRIGGER_READ _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_TIMER_TRIGGER_READ)
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#define LWPMUDRV_IOCTL_GET_INTERVAL_COUNTS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_INTERVAL_COUNTS, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_FLUSH _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_FLUSH, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_SET_SCAN_UNCORE_TOPOLOGY_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_SCAN_UNCORE_TOPOLOGY_INFO, IOCTL_ARGS)
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#define LWPMUDRV_IOCTL_GET_UNCORE_TOPOLOGY _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_UNCORE_TOPOLOGY, IOCTL_ARGS)
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#elif defined(DRV_OS_FREEBSD)
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// IOCTL_ARGS
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typedef struct IOCTL_ARGS_NODE_S IOCTL_ARGS_NODE;
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typedef IOCTL_ARGS_NODE *IOCTL_ARGS;
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struct IOCTL_ARGS_NODE_S {
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|
U64 r_len;
|
|
char *r_buf;
|
|
U64 w_len;
|
|
char *w_buf;
|
|
};
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|
|
|
// IOCTL_SETUP
|
|
//
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|
#define LWPMU_IOC_MAGIC 99
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|
|
|
/* FreeBSD is very strict about IOR/IOW/IOWR specifications on IOCTLs.
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|
* Since these IOCTLs all pass down the real read/write buffer lengths
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|
* and addresses inside of an IOCTL_ARGS_NODE data structure, we
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|
* need to specify all of these as _IOW so that the kernel will
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|
* view it as userspace passing the data to the driver, rather than
|
|
* the reverse. There are also some cases where Linux is passing
|
|
* a smaller type than IOCTL_ARGS_NODE, even though its really
|
|
* passing an IOCTL_ARGS_NODE. These needed to be fixed for FreeBSD.
|
|
*/
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|
#define LWPMUDRV_IOCTL_START _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_START)
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#define LWPMUDRV_IOCTL_STOP _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_STOP)
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#define LWPMUDRV_IOCTL_INIT_PMU _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_PMU)
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|
#define LWPMUDRV_IOCTL_INIT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT, IOCTL_ARGS_NODE)
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#define LWPMUDRV_IOCTL_EM_GROUPS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_GROUPS, IOCTL_ARGS_NODE)
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#define LWPMUDRV_IOCTL_SET_CPU_MASK _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_CPU_MASK, IOCTL_ARGS_NODE)
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#define LWPMUDRV_IOCTL_PCI_READ _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PCI_READ, IOCTL_ARGS_NODE)
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|
#define LWPMUDRV_IOCTL_PCI_WRITE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PCI_WRITE, IOCTL_ARGS_NODE)
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|
#define LWPMUDRV_IOCTL_READ_PCI_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_PCI_CONFIG, IOCTL_ARGS_NODE)
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|
#define LWPMUDRV_IOCTL_FD_PHYS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_FD_PHYS, IOCTL_ARGS_NODE)
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|
#define LWPMUDRV_IOCTL_WRITE_PCI_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_WRITE_PCI_CONFIG, IOCTL_ARGS_NODE)
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|
#define LWPMUDRV_IOCTL_INSERT_MARKER _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INSERT_MARKER, int)
|
|
#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NORMALIZED_TSC, IOCTL_ARGS_NODE)
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|
#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_CONFIG_NEXT, IOCTL_ARGS_NODE)
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|
#define LWPMUDRV_IOCTL_SYS_CONFIG _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_SYS_CONFIG, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_TSC_SKEW_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_TSC_SKEW_INFO, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_NUM_CORES _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_NUM_CORES, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_COLLECT_SYS_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_COLLECT_SYS_CONFIG, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_GET_SYS_CONFIG _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_SYS_CONFIG, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_PAUSE _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_PAUSE)
|
|
#define LWPMUDRV_IOCTL_RESUME _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_RESUME)
|
|
#define LWPMUDRV_IOCTL_SET_ASYNC_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_ASYNC_EVENT, void* )
|
|
#define LWPMUDRV_IOCTL_ASYNC_STOP _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_ASYNC_STOP)
|
|
#define LWPMUDRV_IOCTL_TERMINATE _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_TERMINATE)
|
|
#define LWPMUDRV_IOCTL_READ_MSRS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_MSRS, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_LBR_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_LBR_INFO, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_RESERVE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_RESERVE, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_MARK _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_MARK, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_AWAIT_STOP _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_AWAIT_STOP, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_KERNEL_CS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_KERNEL_CS, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_SET_UID _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_UID, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_VERSION _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_VERSION, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_CHIPSET_INIT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_CHIPSET_INIT, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_GET_CHIPSET_DEVICE_ID _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_CHIPSET_DEVICE_ID, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_SWITCH_GROUP _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_SWITCH_GROUP)
|
|
#define LWPMUDRV_IOCTL_GET_NUM_CORE_CTRS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NUM_CORE_CTRS, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_PWR_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_PWR_INFO, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_NUM_DESCRIPTOR _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_NUM_DESCRIPTOR, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_DESC_NEXT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_DESC_NEXT, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_MARK_OFF _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_MARK_OFF, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_CREATE_MARKER _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_CREATE_MARKER, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_GET_DRIVER_STATE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_DRIVER_STATE, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_READ_SWITCH_GROUP _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_SWITCH_GROUP, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_EM_GROUPS_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_GROUPS_UNC, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_EM_CONFIG_NEXT_UNC, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_INIT_UNC _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_UNC, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_RO_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_RO_INFO, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_READ_MSR _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_MSR, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_WRITE_MSR _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_WRITE_MSR, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_THREAD_SET_NAME _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_THREAD_SET_NAME, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_GET_PLATFORM_INFO _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_PLATFORM_INFO, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC_STANDALONE _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NORMALIZED_TSC_STANDALONE, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_READ_AND_RESET _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_READ_AND_RESET, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_SET_CPU_TOPOLOGY _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_CPU_TOPOLOGY, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_INIT_NUM_DEV _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_INIT_NUM_DEV, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_SET_GFX_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_GFX_EVENT, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_GET_NUM_SAMPLES _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_NUM_SAMPLES, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_SET_PWR_EVENT _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_PWR_EVENT, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_SET_DEVICE_NUM_UNITS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_SET_DEVICE_NUM_UNITS, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_TIMER_TRIGGER_READ _IO (LWPMU_IOC_MAGIC, DRV_OPERATION_TIMER_TRIGGER_READ)
|
|
#define LWPMUDRV_IOCTL_GET_INTERVAL_COUNTS _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_INTERVAL_COUNTS, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_FLUSH _IOW(LWPMU_IOC_MAGIC, DRV_OPERATION_FLUSH, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_SET_SCAN_UNCORE_TOPOLOGY_INFO _IOW(LWPMU_IOC_MAGIC,DRV_OPERATION_SET_SCAN_UNCORE_TOPOLOGY_INFO, IOCTL_ARGS_NODE)
|
|
#define LWPMUDRV_IOCTL_GET_UNCORE_TOPOLOGY _IOR(LWPMU_IOC_MAGIC, DRV_OPERATION_GET_UNCORE_TOPOLOGY, IOCTL_ARGS_NODE)
|
|
|
|
#elif defined(DRV_OS_MAC)
|
|
|
|
// IOCTL_ARGS
|
|
typedef struct IOCTL_ARGS_NODE_S IOCTL_ARGS_NODE;
|
|
typedef IOCTL_ARGS_NODE *IOCTL_ARGS;
|
|
struct IOCTL_ARGS_NODE_S {
|
|
U64 r_len;
|
|
char *r_buf;
|
|
U64 w_len;
|
|
char *w_buf;
|
|
U32 command;
|
|
};
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typedef struct CPU_ARGS_NODE_S CPU_ARGS_NODE;
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typedef CPU_ARGS_NODE *CPU_ARGS;
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struct CPU_ARGS_NODE_S {
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U64 r_len;
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char *r_buf;
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U32 command;
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U32 CPU_ID;
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U32 BUCKET_ID;
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};
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// IOCTL_SETUP
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//
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#define LWPMU_IOC_MAGIC 99
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#define OS_SUCCESS 0
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#define OS_STATUS int
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#define OS_ILLEGAL_IOCTL -ENOTTY
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#define OS_NO_MEM -ENOMEM
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#define OS_FAULT -EFAULT
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// Task file Opcodes.
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// keeping the definitions as IOCTL but in MAC OSX
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// these are really OpCodes consumed by Execute command.
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#define LWPMUDRV_IOCTL_START DRV_OPERATION_START
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#define LWPMUDRV_IOCTL_STOP DRV_OPERATION_STOP
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#define LWPMUDRV_IOCTL_INIT_PMU DRV_OPERATION_INIT_PMU
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#define LWPMUDRV_IOCTL_INIT DRV_OPERATION_INIT
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#define LWPMUDRV_IOCTL_EM_GROUPS DRV_OPERATION_EM_GROUPS
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#define LWPMUDRV_IOCTL_SET_CPU_MASK DRV_OPERATION_SET_CPU_MASK
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#define LWPMUDRV_IOCTL_PCI_READ DRV_OPERATION_PCI_READ
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#define LWPMUDRV_IOCTL_PCI_WRITE DRV_OPERATION_PCI_WRITE
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#define LWPMUDRV_IOCTL_READ_PCI_CONFIG DRV_OPERATION_READ_PCI_CONFIG
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#define LWPMUDRV_IOCTL_FD_PHYS DRV_OPERATION_FD_PHYS
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#define LWPMUDRV_IOCTL_WRITE_PCI_CONFIG DRV_OPERATION_WRITE_PCI_CONFIG
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#define LWPMUDRV_IOCTL_INSERT_MARKER DRV_OPERATION_INSERT_MARKER
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#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC DRV_OPERATION_GET_NORMALIZED_TSC
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|
|
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#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT DRV_OPERATION_EM_CONFIG_NEXT
|
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#define LWPMUDRV_IOCTL_SYS_CONFIG DRV_OPERATION_SYS_CONFIG
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#define LWPMUDRV_IOCTL_TSC_SKEW_INFO DRV_OPERATION_TSC_SKEW_INFO
|
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#define LWPMUDRV_IOCTL_NUM_CORES DRV_OPERATION_NUM_CORES
|
|
#define LWPMUDRV_IOCTL_COLLECT_SYS_CONFIG DRV_OPERATION_COLLECT_SYS_CONFIG
|
|
#define LWPMUDRV_IOCTL_GET_SYS_CONFIG DRV_OPERATION_GET_SYS_CONFIG
|
|
|
|
#define LWPMUDRV_IOCTL_PAUSE DRV_OPERATION_PAUSE
|
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#define LWPMUDRV_IOCTL_RESUME DRV_OPERATION_RESUME
|
|
#define LWPMUDRV_IOCTL_SET_ASYNC_EVENT DRV_OPERATION_SET_ASYNC_EVENT
|
|
#define LWPMUDRV_IOCTL_ASYNC_STOP DRV_OPERATION_ASYNC_STOP
|
|
|
|
#define LWPMUDRV_IOCTL_TERMINATE DRV_OPERATION_TERMINATE
|
|
#define LWPMUDRV_IOCTL_READ_MSRS DRV_OPERATION_READ_MSRS
|
|
#define LWPMUDRV_IOCTL_LBR_INFO DRV_OPERATION_LBR_INFO
|
|
#define LWPMUDRV_IOCTL_RESERVE DRV_OPERATION_RESERVE
|
|
#define LWPMUDRV_IOCTL_MARK DRV_OPERATION_MARK
|
|
|
|
#define LWPMUDRV_IOCTL_AWAIT_STOP DRV_OPERATION_AWAIT_STOP
|
|
|
|
#define LWPMUDRV_IOCTL_KERNEL_CS DRV_OPERATION_KERNEL_CS
|
|
#define LWPMUDRV_IOCTL_SET_UID DRV_OPERATION_SET_UID
|
|
|
|
#define LWPMUDRV_IOCTL_VERSION DRV_OPERATION_VERSION
|
|
#define LWPMUDRV_IOCTL_CHIPSET_INIT DRV_OPERATION_CHIPSET_INIT
|
|
#define LWPMUDRV_IOCTL_GET_CHIPSET_DEVICE_ID DRV_OPERATION_GET_CHIPSET_DEVICE_ID
|
|
#define LWPMUDRV_IOCTL_SWITCH_GROUP DRV_OPERATION_SWITCH_GROUP
|
|
#define LWPMUDRV_IOCTL_GET_NUM_CORE_CTRS DRV_OPERATION_GET_NUM_CORE_CTRS
|
|
#define LWPMUDRV_IOCTL_PWR_INFO DRV_OPERATION_PWR_INFO
|
|
#define LWPMUDRV_IOCTL_NUM_DESCRIPTOR DRV_OPERATION_NUM_DESCRIPTOR
|
|
#define LWPMUDRV_IOCTL_DESC_NEXT DRV_OPERATION_DESC_NEXT
|
|
#define LWPMUDRV_IOCTL_MARK_OFF DRV_OPERATION_MARK_OFF
|
|
#define LWPMUDRV_IOCTL_CREATE_MARKER DRV_OPERATION_CREATE_MARKER
|
|
// EMON INTERNAL
|
|
#define LWPMUDRV_IOCTL_GET_DRIVER_STATE DRV_OPERATION_GET_DRIVER_STATE
|
|
#define LWPMUDRV_IOCTL_READ_SWITCH_GROUP DRV_OPERATION_READ_SWITCH_GROUP
|
|
#define LWPMUDRV_IOCTL_EM_GROUPS_UNC DRV_OPERATION_EM_GROUPS_UNC
|
|
#define LWPMUDRV_IOCTL_EM_CONFIG_NEXT_UNC DRV_OPERATION_EM_CONFIG_NEXT_UNC
|
|
#define LWPMUDRV_IOCTL_INIT_UNC DRV_OPERATION_INIT_UNC
|
|
#define LWPMUDRV_IOCTL_RO_INFO DRV_OPERATION_RO_INFO
|
|
#define LWPMUDRV_IOCTL_READ_MSR DRV_OPERATION_READ_MSR
|
|
#define LWPMUDRV_IOCTL_WRITE_MSR DRV_OPERATION_WRITE_MSR
|
|
#define LWPMUDRV_IOCTL_THREAD_SET_NAME DRV_OPERATION_THREAD_SET_NAME
|
|
|
|
#define LWPMUDRV_IOCTL_GET_NORMALIZED_TSC_STANDALONE DRV_OPERATION_GET_NORMALIZED_TSC_STANDALONE
|
|
|
|
#define LWPMUDRV_IOCTL_READ_AND_RESET DRV_OPERATION_READ_AND_RESET
|
|
#define LWPMUDRV_IOCTL_SET_CPU_TOPOLOGY DRV_OPERATION_SET_CPU_TOPOLOGY
|
|
#define LWPMUDRV_IOCTL_INIT_NUM_DEV DRV_OPERATION_INIT_NUM_DEV
|
|
#define LWPMUDRV_IOCTL_SET_GFX_EVENT DRV_OPERATION_SET_GFX_EVENT
|
|
#define LWPMUDRV_IOCTL_GET_NUM_SAMPLES DRV_OPERATION_GET_NUM_SAMPLES
|
|
#define LWPMUDRV_IOCTL_SET_PWR_EVENT DRV_OPERATION_SET_PWR_EVENT
|
|
#define LWPMUDRV_IOCTL_GET_ASLR_OFFSET DRV_OPERATION_SET_DEVICE_NUM_UNITS
|
|
#define LWPMUDRV_IOCTL_TIMER_TRIGGER_READ DRV_OPERATION_TIMER_TRIGGER_READ
|
|
#define LWPMUDRV_IOCTL_GET_INTERVAL_COUNTS DRV_OPERATION_GET_INTERVAL_COUNTS
|
|
#define LWPMUDRV_IOCTL_FLUSH DRV_OPERATION_FLUSH
|
|
#define LWPMUDRV_IOCTL_SET_SCAN_UNCORE_TOPOLOGY_INFO DRV_OPERATION_SET_SCAN_UNCORE_TOPOLOGY_INFO
|
|
#define LWPMUDRV_IOCTL_GET_UNCORE_TOPOLOGY DRV_OPERATION_GET_UNCORE_TOPOLOGY
|
|
|
|
// This is only for MAC OSX
|
|
#define LWPMUDRV_IOCTL_SET_OSX_VERSION 998
|
|
#define LWPMUDRV_IOCTL_PROVIDE_FUNCTION_PTRS 999
|
|
|
|
#else
|
|
#error "unknown OS in lwpmudrv_ioctl.h"
|
|
#endif
|
|
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif
|
|
|
|
#endif
|
|
|