457 lines
10 KiB
C
457 lines
10 KiB
C
/*
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* i2c-pmic.c: PMIC I2C adapter driver.
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*
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* Copyright (C) 2011 Intel Corporation
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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* Author: Yegnesh Iyer <yegnesh.s.iyer@intel.com>
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*/
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#include <linux/slab.h>
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#include <linux/rpmsg.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/power_supply.h>
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#include <linux/interrupt.h>
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#include <linux/completion.h>
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#include <linux/pm_runtime.h>
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#include <asm/intel_scu_pmic.h>
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#include <asm/intel_mid_rpmsg.h>
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#include <asm/intel_mid_remoteproc.h>
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#include "i2c-pmic-regs.h"
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#define DRIVER_NAME "i2c_pmic_adap"
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#define PMIC_I2C_ADAPTER 8
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enum I2C_STATUS {
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I2C_WR = 1,
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I2C_RD,
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I2C_NACK = 4
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};
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static struct pmic_i2c_dev *pmic_dev;
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/* Function Definitions */
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/* PMIC I2C read-write completion interrupt handler */
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static irqreturn_t pmic_i2c_handler(int irq, void *data)
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{
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u8 irq0_int;
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irq0_int = ioread8(pmic_dev->pmic_intr_map);
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irq0_int &= PMIC_I2C_INTR_MASK;
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if (irq0_int) {
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pmic_dev->i2c_rw = (irq0_int >> IRQ0_I2C_BIT_POS);
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return IRQ_WAKE_THREAD;
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}
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return IRQ_NONE;
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}
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static irqreturn_t pmic_thread_handler(int id, void *data)
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{
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#define IRQLVL1_MASK_ADDR 0x0c
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#define IRQLVL1_CHRGR_MASK D5
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dev_dbg(pmic_dev->dev, "Clearing IRQLVL1_MASK_ADDR\n");
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intel_scu_ipc_update_register(IRQLVL1_MASK_ADDR, 0x00,
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IRQLVL1_CHRGR_MASK);
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wake_up(&(pmic_dev->i2c_wait));
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return IRQ_HANDLED;
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}
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/* PMIC i2c read msg */
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static inline int pmic_i2c_read_xfer(struct i2c_msg msg)
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{
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int ret;
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u16 i;
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u8 mask = (I2C_RD | I2C_NACK);
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u16 regs[I2C_MSG_LEN] = {0};
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u8 data[I2C_MSG_LEN] = {0};
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for (i = 0; i < msg.len ; i++) {
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pmic_dev->i2c_rw = 0;
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regs[0] = I2COVRDADDR_ADDR;
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data[0] = msg.addr;
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regs[1] = I2COVROFFSET_ADDR;
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data[1] = msg.buf[0] + i;
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/* intel_scu_ipc_function works fine for even number of bytes */
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/* Hence adding a dummy byte transfer */
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regs[2] = I2COVROFFSET_ADDR;
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data[2] = msg.buf[0] + i;
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regs[3] = I2COVRCTRL_ADDR;
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data[3] = I2COVRCTRL_I2C_RD;
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ret = intel_scu_ipc_writev(regs, data, I2C_MSG_LEN);
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if (unlikely(ret))
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return ret;
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ret = wait_event_timeout(pmic_dev->i2c_wait,
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(pmic_dev->i2c_rw & mask),
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HZ);
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if (ret == 0) {
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ret = -ETIMEDOUT;
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goto read_err_exit;
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} else if (pmic_dev->i2c_rw == I2C_NACK) {
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ret = -EIO;
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goto read_err_exit;
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} else {
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ret = intel_scu_ipc_ioread8(I2COVRRDDATA_ADDR,
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&(msg.buf[i]));
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if (unlikely(ret)) {
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ret = -EIO;
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goto read_err_exit;
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}
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}
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}
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return 0;
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read_err_exit:
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return ret;
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}
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/* PMIC i2c write msg */
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static inline int pmic_i2c_write_xfer(struct i2c_msg msg)
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{
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int ret;
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u16 i;
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u8 mask = (I2C_WR | I2C_NACK);
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u16 regs[I2C_MSG_LEN] = {0};
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u8 data[I2C_MSG_LEN] = {0};
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for (i = 1; i <= msg.len ; i++) {
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pmic_dev->i2c_rw = 0;
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regs[0] = I2COVRDADDR_ADDR;
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data[0] = msg.addr;
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regs[1] = I2COVRWRDATA_ADDR;
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data[1] = msg.buf[i];
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regs[2] = I2COVROFFSET_ADDR;
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data[2] = msg.buf[0] + i - 1;
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regs[3] = I2COVRCTRL_ADDR;
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data[3] = I2COVRCTRL_I2C_WR;
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ret = intel_scu_ipc_writev(regs, data, I2C_MSG_LEN);
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if (unlikely(ret))
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return ret;
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ret = wait_event_timeout(pmic_dev->i2c_wait,
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(pmic_dev->i2c_rw & mask),
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HZ);
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if (ret == 0)
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return -ETIMEDOUT;
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else if (pmic_dev->i2c_rw == I2C_NACK)
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return -EIO;
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}
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return 0;
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}
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static int (*xfer_fn[]) (struct i2c_msg) = {
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pmic_i2c_write_xfer,
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pmic_i2c_read_xfer
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};
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/* PMIC I2C Master transfer algorithm function */
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static int pmic_master_xfer(struct i2c_adapter *adap,
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struct i2c_msg msgs[],
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int num)
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{
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int ret = 0;
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int i;
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u8 index;
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mutex_lock(&pmic_dev->i2c_pmic_rw_lock);
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wake_lock(&pmic_dev->i2c_wake_lock);
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pm_runtime_get_sync(pmic_dev->dev);
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for (i = 0 ; i < num ; i++) {
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index = msgs[i].flags & I2C_M_RD;
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ret = (xfer_fn[index])(msgs[i]);
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if (ret == -EACCES)
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dev_info(pmic_dev->dev, "Blocked Access!\n");
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/* If access is restricted, return true to
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* avoid extra error handling in client
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*/
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if (ret != 0 && ret != -EACCES)
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goto transfer_err_exit;
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}
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ret = num;
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transfer_err_exit:
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mutex_unlock(&pmic_dev->i2c_pmic_rw_lock);
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pm_runtime_put_sync(pmic_dev->dev);
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wake_unlock(&pmic_dev->i2c_wake_lock);
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intel_scu_ipc_update_register(IRQLVL1_MASK_ADDR, 0x00,
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IRQLVL1_CHRGR_MASK);
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return ret;
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}
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/* PMIC I2C adapter capability function */
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static u32 pmic_master_func(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_BYTE_DATA;
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}
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static int pmic_smbus_xfer(struct i2c_adapter *adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size,
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union i2c_smbus_data *data)
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{
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struct i2c_msg msg;
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u8 buf[2];
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int ret;
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msg.addr = addr;
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msg.flags = flags & I2C_M_TEN;
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msg.buf = buf;
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msg.buf[0] = command;
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if (read_write == I2C_SMBUS_WRITE) {
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msg.len = 1;
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msg.buf[1] = data->byte;
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} else {
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msg.flags |= I2C_M_RD;
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msg.len = 1;
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}
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ret = pmic_master_xfer(adap, &msg, 1);
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if (ret == 1) {
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if (read_write == I2C_SMBUS_READ)
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data->byte = msg.buf[0];
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return 0;
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}
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return ret;
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}
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static const struct i2c_algorithm pmic_i2c_algo = {
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.master_xfer = pmic_master_xfer,
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.functionality = pmic_master_func,
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.smbus_xfer = pmic_smbus_xfer,
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};
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static int pmic_i2c_probe(struct platform_device *pdev)
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{
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struct i2c_adapter *adap;
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int ret;
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pmic_dev = kzalloc(sizeof(struct pmic_i2c_dev), GFP_KERNEL);
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if (!pmic_dev)
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return -ENOMEM;
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pmic_dev->dev = &pdev->dev;
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pmic_dev->irq = platform_get_irq(pdev, 0);
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mutex_init(&pmic_dev->i2c_pmic_rw_lock);
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wake_lock_init(&pmic_dev->i2c_wake_lock, WAKE_LOCK_SUSPEND,
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"pmic_i2c_wake_lock");
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init_waitqueue_head(&(pmic_dev->i2c_wait));
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pmic_dev->pmic_intr_map = ioremap_nocache(PMIC_SRAM_INTR_ADDR, 8);
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if (!pmic_dev->pmic_intr_map) {
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dev_err(&pdev->dev, "ioremap Failed\n");
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ret = -ENOMEM;
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goto ioremap_failed;
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}
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ret = request_threaded_irq(pmic_dev->irq, pmic_i2c_handler,
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pmic_thread_handler,
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IRQF_SHARED|IRQF_NO_SUSPEND,
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DRIVER_NAME, pmic_dev);
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if (ret)
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goto err_irq_request;
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ret = intel_scu_ipc_update_register(IRQLVL1_MASK_ADDR, 0x00,
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IRQLVL1_CHRGR_MASK);
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if (unlikely(ret))
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goto unmask_irq_failed;
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ret = intel_scu_ipc_update_register(MCHGRIRQ0_ADDR, 0x00,
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PMIC_I2C_INTR_MASK);
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if (unlikely(ret))
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goto unmask_irq_failed;
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/* Init runtime PM state*/
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pm_runtime_put_noidle(pmic_dev->dev);
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adap = &pmic_dev->adapter;
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adap->owner = THIS_MODULE;
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adap->class = I2C_CLASS_HWMON;
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adap->algo = &pmic_i2c_algo;
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strcpy(adap->name, "PMIC I2C Adapter");
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adap->nr = PMIC_I2C_ADAPTER;
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ret = i2c_add_numbered_adapter(adap);
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if (ret) {
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dev_err(&pdev->dev, "Error adding the adapter\n");
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goto err_adap_add;
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}
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pm_schedule_suspend(pmic_dev->dev, MSEC_PER_SEC);
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return 0;
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err_adap_add:
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free_irq(pmic_dev->irq, pmic_dev);
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unmask_irq_failed:
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err_irq_request:
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iounmap(pmic_dev->pmic_intr_map);
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ioremap_failed:
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kfree(pmic_dev);
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return ret;
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}
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static int pmic_i2c_remove(struct platform_device *pdev)
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{
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iounmap(pmic_dev->pmic_intr_map);
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free_irq(pmic_dev->irq, pmic_dev);
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pm_runtime_get_noresume(pmic_dev->dev);
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kfree(pmic_dev);
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return 0;
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}
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#ifdef CONFIG_PM
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static int pmic_i2c_suspend(struct device *dev)
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{
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dev_info(dev, "%s\n", __func__);
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return 0;
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}
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static int pmic_i2c_resume(struct device *dev)
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{
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dev_info(dev, "%s\n", __func__);
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return 0;
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}
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#endif
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#ifdef CONFIG_PM_RUNTIME
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static int pmic_i2c_runtime_suspend(struct device *dev)
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{
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dev_info(dev, "%s\n", __func__);
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return 0;
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}
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static int pmic_i2c_runtime_resume(struct device *dev)
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{
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dev_info(dev, "%s\n", __func__);
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return 0;
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}
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static int pmic_i2c_runtime_idle(struct device *dev)
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{
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dev_info(dev, "%s\n", __func__);
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return 0;
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}
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#endif
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static const struct dev_pm_ops pmic_i2c_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(pmic_i2c_suspend,
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pmic_i2c_resume)
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SET_RUNTIME_PM_OPS(pmic_i2c_runtime_suspend,
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pmic_i2c_runtime_resume,
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pmic_i2c_runtime_idle)
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};
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struct platform_driver pmic_i2c_driver = {
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.probe = pmic_i2c_probe,
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.remove = pmic_i2c_remove,
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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.pm = &pmic_i2c_pm_ops,
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},
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};
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static int pmic_i2c_init(void)
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{
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return platform_driver_register(&pmic_i2c_driver);
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}
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static void pmic_i2c_exit(void)
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{
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platform_driver_unregister(&pmic_i2c_driver);
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}
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static int pmic_i2c_rpmsg_probe(struct rpmsg_channel *rpdev)
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{
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int ret = 0;
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if (rpdev == NULL) {
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pr_err("rpmsg channel not created\n");
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ret = -ENODEV;
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goto out;
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}
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dev_info(&rpdev->dev, "Probed pmic_i2c rpmsg device\n");
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ret = pmic_i2c_init();
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out:
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return ret;
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}
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static void pmic_i2c_rpmsg_remove(struct rpmsg_channel *rpdev)
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{
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pmic_i2c_exit();
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dev_info(&rpdev->dev, "Removed pmic_i2c rpmsg device\n");
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}
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static void pmic_i2c_rpmsg_cb(struct rpmsg_channel *rpdev, void *data,
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int len, void *priv, u32 src)
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{
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dev_warn(&rpdev->dev, "unexpected, message\n");
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print_hex_dump(KERN_DEBUG, __func__, DUMP_PREFIX_NONE, 16, 1,
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data, len, true);
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}
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static struct rpmsg_device_id pmic_i2c_rpmsg_id_table[] = {
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{ .name = "rpmsg_i2c_pmic_adap" },
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{ },
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};
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MODULE_DEVICE_TABLE(rpmsg, pmic_i2c_rpmsg_id_table);
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static struct rpmsg_driver pmic_i2c_rpmsg = {
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.drv.name = KBUILD_MODNAME,
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.drv.owner = THIS_MODULE,
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.id_table = pmic_i2c_rpmsg_id_table,
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.probe = pmic_i2c_rpmsg_probe,
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.callback = pmic_i2c_rpmsg_cb,
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.remove = pmic_i2c_rpmsg_remove,
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};
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static int __init pmic_i2c_rpmsg_init(void)
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{
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return register_rpmsg_driver(&pmic_i2c_rpmsg);
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}
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static void __exit pmic_i2c_rpmsg_exit(void)
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{
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return unregister_rpmsg_driver(&pmic_i2c_rpmsg);
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}
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module_init(pmic_i2c_rpmsg_init);
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module_exit(pmic_i2c_rpmsg_exit);
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MODULE_AUTHOR("Yegnesh Iyer <yegnesh.s.iyer@intel.com");
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MODULE_DESCRIPTION("PMIC I2C Master driver");
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MODULE_LICENSE("GPL");
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