309 lines
7.8 KiB
C
309 lines
7.8 KiB
C
/**************************************************************************
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* Copyright (c) 2007-2008, Intel Corporation.
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* All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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**************************************************************************/
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#ifndef _VXD_DRV_H_
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#define _VXD_DRV_H_
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#include "i915_drv.h"
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#include <linux/io-mapping.h>
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#include <linux/kref.h>
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#include <ttm/ttm_object.h>
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#include "psb_ttm_fence_driver.h"
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#include "psb_ttm_userobj_api.h"
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#include "ttm/ttm_bo_driver.h"
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#include "ttm/ttm_lock.h"
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#include "psb_video_drv.h"
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#include "psb_msvdx.h"
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#define PSB_PMPOLICY_NOPM 0
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#define PSB_PMPOLICY_CLOCKGATING 1
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#define PSB_PMPOLICY_POWERDOWN 2
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#define PSB_BOTTOM_HALF_WQ 1
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#define PSB_BOTTOM_HALF_TQ 2
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#define PSB_MSVDX_CLOCKGATING 0x2064
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#define PSB_MMU_CACHED_MEMORY 0x0001 /* Bind to MMU only */
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#define PSB_MMU_RO_MEMORY 0x0002 /* MMU RO memory */
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#define PSB_MMU_WO_MEMORY 0x0004 /* MMU WO memory */
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/*
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*PTE's and PDE's
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*/
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#define PSB_PDE_MASK 0x003FFFFF
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#define PSB_PDE_SHIFT 22
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#define PSB_PTE_SHIFT 12
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#define PSB_PTE_VALID 0x0001 /* PTE / PDE valid */
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#define PSB_PTE_WO 0x0002 /* Write only */
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#define PSB_PTE_RO 0x0004 /* Read only */
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#define PSB_PTE_CACHED 0x0008 /* CPU cache coherent */
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#define IS_MDFLD(dev) (0)
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#define IS_MRFLD(dev) (0)
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enum APM_VXD_STATUS {
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VXD_APM_STS_D0 = 0,
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VXD_APM_STS_D1,
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VXD_APM_STS_D2,
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VXD_APM_STS_D3
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};
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extern struct ttm_bo_driver psb_ttm_bo_driver;
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struct psb_context;
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struct psb_validate_buffer;
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struct psb_video_ctx;
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/*
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*User options.
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*/
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struct drm_psb_uopt {
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int pad; /*keep it here in case we use it in future */
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};
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struct drm_psb_private {
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/*
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*TTM Glue.
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*/
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struct drm_global_reference mem_global_ref;
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struct ttm_bo_global_ref bo_global_ref;
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int has_global;
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struct drm_device *dev;
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struct ttm_object_device *tdev;
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struct ttm_fence_device fdev;
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struct ttm_bo_device bdev;
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struct ttm_lock ttm_lock;
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struct vm_operations_struct *ttm_vm_ops;
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int has_fence_device;
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int has_bo_device;
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struct drm_psb_dev_info_arg dev_info;
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struct drm_psb_uopt uopt;
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uint32_t sequence[PSB_NUM_ENGINES];
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uint32_t last_sequence[PSB_NUM_ENGINES];
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uint32_t last_submitted_seq[PSB_NUM_ENGINES];
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struct psb_mmu_driver *mmu;
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struct psb_mmu_pd *pf_pd;
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/* IMG video context */
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struct list_head video_ctx;
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spinlock_t video_ctx_lock;
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/*
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*MSVDX
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*/
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uint8_t *msvdx_reg;
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atomic_t msvdx_mmu_invaldc;
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void *msvdx_private;
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spinlock_t irqmask_lock;
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spinlock_t sequence_lock;
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/*
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*Memory managers
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*/
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int have_mem_mmu;
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int have_mem_mmu_tiling;
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struct mutex temp_mem;
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/*
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*Relocation buffer mapping.
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*/
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spinlock_t reloc_lock;
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unsigned int rel_mapped_pages;
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wait_queue_head_t rel_mapped_queue;
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/*
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* Sizes info
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*/
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struct drm_psb_sizes_arg sizes;
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uint32_t fuse_reg_value;
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/* pci revision id for B0:D2:F0 */
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uint8_t platform_rev_id;
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/*runtime PM state */
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int rpm_enabled;
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/*
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*Scheduling.
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*/
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struct mutex reset_mutex;
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struct mutex cmdbuf_mutex;
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/*uint32_t ta_mem_pages;
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struct psb_ta_mem *ta_mem;
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int force_ta_mem_load; */
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atomic_t val_seq;
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/*
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*TODO: change this to be per drm-context.
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*/
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struct psb_context decode_context;
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/*
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*Watchdog
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*/
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spinlock_t watchdog_lock;
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struct timer_list watchdog_timer;
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struct work_struct watchdog_wq;
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struct work_struct msvdx_watchdog_wq;
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struct work_struct topaz_watchdog_wq;
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struct work_struct hdmi_hotplug_wq;
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struct work_struct hdmi_audio_wq;
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atomic_t hotplug_wq_done;
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int timer_available;
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/* read register value through sysfs. */
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int count;
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char buf[256];
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struct pci_dev *pci_root;
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struct mutex vxd_pm_mutex;
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};
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/*
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*Debug print bits setting
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*/
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#define PSB_D_GENERAL (1 << 0)
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#define PSB_D_INIT (1 << 1)
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#define PSB_D_IRQ (1 << 2)
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#define PSB_D_ENTRY (1 << 3)
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/* debug the get H/V BP/FP count */
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#define PSB_D_HV (1 << 4)
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#define PSB_D_DBI_BF (1 << 5)
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#define PSB_D_PM (1 << 6)
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#define PSB_D_RENDER (1 << 7)
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#define PSB_D_REG (1 << 8)
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#define PSB_D_MSVDX (1 << 9)
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#define PSB_D_TOPAZ (1 << 10)
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#define VSP_D_LOG (1 << 11)
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#define VSP_D_PERF (1 << 12)
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#define PSB_D_WARN (1 << 13)
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#define PSB_D_MIPI (1 << 14)
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#define VXD_TTM_MMAP_OFFSET_START DRM_PSB_FILE_PAGE_OFFSET
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#define VXD_TTM_MMAP_OFFSET_END (DRM_PSB_FILE_PAGE_OFFSET + 0x10000000)
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extern int drm_psb_debug;
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#define PSB_DEBUG_GENERAL(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_GENERAL, _fmt, ##_arg)
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#define PSB_DEBUG_INIT(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_INIT, _fmt, ##_arg)
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#define PSB_DEBUG_IRQ(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_IRQ, _fmt, ##_arg)
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#define PSB_DEBUG_ENTRY(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_ENTRY, _fmt, ##_arg)
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#define PSB_DEBUG_HV(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_HV, _fmt, ##_arg)
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#define PSB_DEBUG_DBI_BF(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_DBI_BF, _fmt, ##_arg)
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#define PSB_DEBUG_PM(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_PM, _fmt, ##_arg)
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#define PSB_DEBUG_RENDER(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_RENDER, _fmt, ##_arg)
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#define PSB_DEBUG_REG(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_REG, _fmt, ##_arg)
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#define PSB_DEBUG_MSVDX(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_MSVDX, _fmt, ##_arg)
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#define PSB_DEBUG_TOPAZ(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_TOPAZ, _fmt, ##_arg)
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#define VSP_DEBUG(_fmt, _arg...) \
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PSB_DEBUG(VSP_D_LOG, "VSP: "_fmt, ##_arg)
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#define VSP_PERF(_fmt, _arg...) \
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PSB_DEBUG(VSP_D_PERF, "VSP PERFORMANCE: "_fmt, ##_arg)
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/* force to print WARN msg */
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#define PSB_DEBUG_WARN(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_WARN, _fmt, ##_arg)
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#define PSB_DEBUG_MIPI(_fmt, _arg...) \
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PSB_DEBUG(PSB_D_MIPI, _fmt, ##_arg)
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#define IS_MSVDX_MEM_TILE(dev) 1
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#if DRM_DEBUG_CODE
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#define PSB_DEBUG(_flag, _fmt, _arg...) \
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do { \
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if (unlikely((_flag) & drm_psb_debug)) \
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printk(KERN_INFO \
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"[psb:0x%02x:%s] " _fmt , _flag, \
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__func__ , ##_arg); \
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} while (0)
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#else
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#define PSB_DEBUG(_fmt, _arg...) do { } while (0)
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#endif
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struct psb_fpriv {
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struct ttm_object_file *tfile;
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bool dsr_blocked;
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};
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struct psb_fpriv *psb_fpriv(struct drm_file *file_priv);
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struct drm_psb_private *psb_priv(struct drm_device *dev);
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extern int drm_psb_cpurelax;
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extern int drm_psb_udelaydivider;
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extern int drm_psb_priv_pmu_func;
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/*
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* set cpu_relax = 1 in sysfs to use cpu_relax instead of udelay bysy loop
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* set udelay_divider to reduce the udelay values,e.g.= 10, reduce 10 times
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*/
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#define PSB_UDELAY(usec) \
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do { \
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if (drm_psb_cpurelax == 0) \
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DRM_UDELAY(usec / drm_psb_udelaydivider); \
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else \
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cpu_relax(); \
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} while (0)
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struct psb_fpriv *psb_fpriv(struct drm_file *file_priv);
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struct drm_psb_private *psb_priv(struct drm_device *dev);
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int vxd_release(struct inode *inode, struct file *filp);
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int psb_mmap(struct file *filp, struct vm_area_struct *vma);
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int ivxd_mmap(struct file *filp, struct vm_area_struct *vma);
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void vxd_lastclose(struct drm_device *dev);
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int vxd_driver_open(struct drm_device *dev, struct drm_file *file);
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long vxd_ioctl(struct file *filp, unsigned int cmd, unsigned long arg);
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/* pm related start */
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#define OSPM_VIDEO_DEC_ISLAND 1
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bool ospm_power_using_video_begin(int hw_island);
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void ospm_power_using_video_end(int hw_island);
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int ospm_apm_power_down_msvdx(struct drm_device *dev, int force_off);
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/* end */
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#endif
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