209 lines
6.2 KiB
C
209 lines
6.2 KiB
C
/**************************************************************************
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*
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* Copyright (c) 2007 Intel Corporation, Hillsboro, OR, USA
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* Copyright (c) Imagination Technologies Limited, UK
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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**************************************************************************/
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#ifndef _PNW_TOPAZ_H_
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#define _PNW_TOPAZ_H_
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#include "psb_drv.h"
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#include "img_types.h"
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#define PNW_TOPAZ_NO_IRQ 0
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#define TOPAZ_MTX_REG_SIZE (34 * 4 + 183 * 4)
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#define MAX_TOPAZ_CORES 2
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/*Must be equal to IMG_CODEC_NUM*/
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#define PNW_TOPAZ_CODEC_NUM_MAX (11)
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#define PNW_TOPAZ_BIAS_TABLE_MAX_SIZE (2 * 1024)
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/* #define TOPAZ_PDUMP */
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/* Max command buffer size */
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#define PNW_MAX_CMD_BUF_PAGE_NUM (2)
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/* One cmd set contains 4 words */
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#define PNW_TOPAZ_WORDS_PER_CMDSET (4)
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#define PNW_TOPAZ_POLL_DELAY (100)
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#define PNW_TOPAZ_POLL_RETRY (10000)
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#define TOPAZ_NEW_CODEC_CMD_BYTES (4 * 2)
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#define TOPAZ_COMMON_CMD_BYTES (4 * 3)
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#define TOPAZ_POWER_CMD_BYTES (0)
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/* Every WRITEREG command set contain 2 words.
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The first word indicates register offset.
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The second word indicates register value */
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#define TOPAZ_WRITEREG_BYTES_PER_SET (4 * 2)
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#define TOPAZ_WRITEREG_MAX_SETS \
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(PNW_TOPAZ_BIAS_TABLE_MAX_SIZE / TOPAZ_WRITEREG_BYTES_PER_SET)
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/* in words */
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#define TOPAZ_CMD_FIFO_SIZE (32)
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#define PNW_IS_H264_ENC(codec) \
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(codec == IMG_CODEC_H264_VBR || \
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codec == IMG_CODEC_H264_VCM || \
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codec == IMG_CODEC_H264_CBR || \
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codec == IMG_CODEC_H264_NO_RC)
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#define PNW_IS_JPEG_ENC(codec) \
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(codec == IMG_CODEC_JPEG)
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#define PNW_IS_MPEG4_ENC(codec) \
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(codec == IMG_CODEC_MPEG4_VBR || \
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codec == IMG_CODEC_MPEG4_CBR || \
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codec == IMG_CODEC_MPEG4_NO_RC)
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#define PNW_IS_H263_ENC(codec) \
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(codec == IMG_CODEC_H263_VBR || \
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codec == IMG_CODEC_H263_CBR || \
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codec == IMG_CODEC_H263_NO_RC)
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extern int drm_topaz_pmpolicy;
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/* XXX: it's a copy of msvdx cmd queue. should have some change? */
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struct pnw_topaz_cmd_queue {
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struct list_head head;
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void *cmd;
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unsigned long cmd_size;
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uint32_t sequence;
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};
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/* define structure */
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/* firmware file's info head */
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struct topazsc_fwinfo {
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unsigned int ver:16;
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unsigned int codec:16;
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unsigned int text_size;
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unsigned int data_size;
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unsigned int data_location;
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};
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/* firmware data array define */
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struct pnw_topaz_codec_fw {
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uint32_t ver;
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uint32_t codec;
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uint32_t text_size;
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uint32_t data_size;
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uint32_t data_location;
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struct ttm_buffer_object *text;
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struct ttm_buffer_object *data;
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};
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struct pnw_topaz_private {
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struct drm_device *dev;
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unsigned int pmstate;
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struct sysfs_dirent *sysfs_pmstate;
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/*Save content of MTX register, whole RAM and BIAS table*/
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void *topaz_mtx_reg_state[MAX_TOPAZ_CORES];
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struct ttm_buffer_object *topaz_mtx_data_mem[MAX_TOPAZ_CORES];
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uint32_t topaz_cur_codec;
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uint32_t cur_mtx_data_size[MAX_TOPAZ_CORES];
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int topaz_needs_reset;
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void *topaz_bias_table[MAX_TOPAZ_CORES];
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/*
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*topaz command queue
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*/
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spinlock_t topaz_lock;
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struct list_head topaz_queue;
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int topaz_busy; /* 0 means topaz is free */
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int topaz_fw_loaded;
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uint32_t stored_initial_qp;
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uint32_t topaz_dash_access_ctrl;
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struct ttm_buffer_object *topaz_bo; /* 4K->2K/2K for writeback/sync */
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struct ttm_bo_kmap_obj topaz_bo_kmap;
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uint32_t *topaz_mtx_wb;
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uint32_t topaz_wb_offset;
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uint32_t *topaz_sync_addr;
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uint32_t topaz_sync_offset;
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uint32_t topaz_cmd_count;
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uint32_t topaz_mtx_saved;
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/* firmware */
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struct pnw_topaz_codec_fw topaz_fw[PNW_TOPAZ_CODEC_NUM_MAX * 2];
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uint32_t topaz_hw_busy;
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uint32_t topaz_num_cores;
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/*Before load firmware, need to set up jitter according to resolution*/
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/*The data of MTX_CMDID_SW_NEW_CODEC command contains width and length*/
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uint16_t frame_w;
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uint16_t frame_h;
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/* topaz suspend work queue */
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struct delayed_work topaz_suspend_wq;
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uint32_t pm_gating_count;
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};
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/* external function declare */
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/*ISR of TopazSC*/
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extern IMG_BOOL pnw_topaz_interrupt(IMG_VOID *pvData);
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/*topaz commad handling function*/
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extern int pnw_cmdbuf_video(struct drm_file *priv,
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struct list_head *validate_list,
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uint32_t fence_type,
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struct drm_psb_cmdbuf_arg *arg,
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struct ttm_buffer_object *cmd_buffer,
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struct psb_ttm_fence_rep *fence_arg);
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extern int pnw_wait_topaz_idle(struct drm_device *dev);
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extern int pnw_check_topaz_idle(struct drm_device *dev);
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extern int pnw_topaz_restore_mtx_state(struct drm_device *dev);
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extern void pnw_topaz_enableirq(struct drm_device *dev);
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extern void pnw_topaz_disableirq(struct drm_device *dev);
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extern int pnw_topaz_init(struct drm_device *dev);
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extern int pnw_topaz_uninit(struct drm_device *dev);
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extern void pnw_topaz_handle_timeout(struct ttm_fence_device *fdev);
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extern int pnw_topaz_save_mtx_state(struct drm_device *dev);
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#define PNW_TOPAZ_START_CTX (0x1)
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#define PNW_TOPAZ_END_CTX (0x1<<1)
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extern void pnw_reset_fw_status(struct drm_device *dev, u32 flag);
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extern void topaz_write_core_reg(struct drm_psb_private *dev_priv,
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uint32_t core,
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uint32_t reg,
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const uint32_t val);
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extern void topaz_read_core_reg(struct drm_psb_private *dev_priv,
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uint32_t core,
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uint32_t reg,
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uint32_t *ret_val);
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extern void psb_powerdown_topaz(struct work_struct *work);
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extern void pnw_topaz_flush_cmd_queue(struct pnw_topaz_private *topaz_priv);
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#define PNW_TOPAZ_NEW_PMSTATE(drm_dev, topaz_priv, new_state) \
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do { \
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topaz_priv->pmstate = new_state; \
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if (new_state == PSB_PMSTATE_POWERDOWN) \
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topaz_priv->pm_gating_count++; \
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sysfs_notify_dirent(topaz_priv->sysfs_pmstate); \
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PSB_DEBUG_PM("TOPAZ: %s, power gating count 0x%08x\n", \
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(new_state == PSB_PMSTATE_POWERUP) ? "powerup" : "powerdown", \
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topaz_priv->pm_gating_count); \
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} while (0)
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#endif /* _PNW_TOPAZ_H_ */
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