199 lines
4.9 KiB
C
199 lines
4.9 KiB
C
/*
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*
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* Copyright (c) 2013 Intel Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#ifndef __AP1302_H__
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#define __AP1302_H__
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#include <linux/atomisp_platform.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-subdev.h>
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#define AP1302_NAME "ap1302"
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#define AP1302_CHIP_ID 0x265
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#define AP1302_I2C_MAX_LEN 65534
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#define AP1302_FW_WINDOW_OFFSET 0x8000
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#define AP1302_FW_WINDOW_SIZE 0x2000
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#define AP1302_REG16 2
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#define AP1302_REG32 4
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#define REG_CHIP_VERSION 0x0000
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#define REG_CHIP_REV 0x0050
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#define REG_MF_ID 0x0004
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#define REG_ERROR 0x0006
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#define REG_CTRL 0x1000
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#define REG_DZ_TGT_FCT 0x1010
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#define REG_SFX_MODE 0x1016
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#define REG_SS_HEAD_PT0 0x1174
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#define REG_AE_BV_OFF 0x5014
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#define REG_AE_BV_BIAS 0x5016
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#define REG_AWB_CTRL 0x5100
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#define REG_FLICK_CTRL 0x5440
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#define REG_SCENE_CTRL 0x5454
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#define REG_BOOTDATA_STAGE 0x6002
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#define REG_SENSOR_SELECT 0x600C
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#define REG_SYS_START 0x601A
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#define REG_SIP_CRC 0xF052
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#define REG_PREVIEW_BASE 0x2000
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#define REG_SNAPSHOT_BASE 0x3000
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#define REG_VIDEO_BASE 0x4000
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#define CNTX_WIDTH 0x00
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#define CNTX_HEIGHT 0x02
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#define CNTX_ROI_X0 0x04
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#define CNTX_ROI_Y0 0x06
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#define CNTX_ROI_X1 0x08
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#define CNTX_ROI_Y1 0x0A
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#define CNTX_ASPECT 0x0C
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#define CNTX_LOCK 0x0E
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#define CNTX_ENABLE 0x10
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#define CNTX_OUT_FMT 0x12
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#define CNTX_SENSOR_MODE 0x14
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#define CNTX_MIPI_CTRL 0x16
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#define CNTX_MIPI_II_CTRL 0x18
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#define CNTX_LINE_TIME 0x1C
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#define CNTX_MAX_FPS 0x20
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#define CNTX_AE_USG 0x22
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#define CNTX_AE_UPPER_ET 0x24
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#define CNTX_AE_MAX_ET 0x28
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#define CNTX_SS 0x2C
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#define CNTX_S1_SENSOR_MODE 0x2E
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#define CNTX_HINF_CTRL 0x30
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#define CTRL_CNTX_MASK 0x03
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#define CTRL_CNTX_OFFSET 0x00
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#define HINF_CTRL_LANE_MASK 0x07
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#define HINF_CTRL_LANE_OFFSET 0x00
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#define MIPI_CTRL_IMGVC_MASK 0xC0
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#define MIPI_CTRL_IMGVC_OFFSET 0x06
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#define MIPI_CTRL_IMGTYPE_AUTO 0x3F
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#define MIPI_CTRL_SSVC_MASK 0xC000
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#define MIPI_CTRL_SSVC_OFFSET 0x0E
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#define MIPI_CTRL_SSTYPE_MASK 0x3F00
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#define MIPI_CTRL_SSTYPE_OFFSET 0x08
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#define OUT_FMT_IIS_MASK 0x30
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#define OUT_FMT_IIS_OFFSET 0x08
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#define OUT_FMT_SS_MASK 0x1000
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#define OUT_FMT_SS_OFFSET 0x12
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#define OUT_FMT_TYPE_MASK 0xFF
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#define SENSOR_SELECT_MASK 0x03
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#define SENSOR_SELECT_OFFSET 0x00
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#define AWB_CTRL_MODE_MASK 0x0F
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#define AWB_CTRL_MODE_OFFSET 0x00
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#define AWB_CTRL_FLASH_MASK 0x100
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#define AP1302_FMT_UYVY422 0x50
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#define AP1302_SYS_ACTIVATE 0x8010
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#define AP1302_SYS_SWITCH 0x8140
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#define AP1302_SENSOR_PRI 0x01
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#define AP1302_SENSOR_SEC 0x02
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#define AP1302_SS_CTRL 0x31
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#define AP1302_MAX_RATIO_MISMATCH 10 /* Unit in percentage */
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#define AP1302_MAX_EV 2
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#define AP1302_MIN_EV -2
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enum ap1302_contexts {
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CONTEXT_PREVIEW = 0,
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CONTEXT_SNAPSHOT,
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CONTEXT_VIDEO,
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CONTEXT_NUM
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};
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/* The context registers are defined according to preview/video registers.
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Preview and video context have the same register definition.
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But snapshot context does not have register S1_SENSOR_MODE.
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When setting snapshot registers, if the offset exceeds
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S1_SENSOR_MODE, the actual offset needs to minus 2. */
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struct ap1302_context_config {
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u16 width;
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u16 height;
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u16 roi_x0;
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u16 roi_y0;
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u16 roi_x1;
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u16 roi_y1;
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u16 aspect_factor;
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u16 lock;
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u16 enable;
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u16 out_fmt;
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u16 sensor_mode;
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u16 mipi_ctrl;
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u16 mipi_ii_ctrl;
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u16 padding;
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u32 line_time;
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u16 max_fps;
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u16 ae_usg;
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u32 ae_upper_et;
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u32 ae_max_et;
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u16 ss;
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u16 s1_sensor_mode;
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u16 hinf_ctrl;
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u32 reserved;
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};
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struct ap1302_res_struct {
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u16 width;
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u16 height;
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u16 fps;
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};
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struct ap1302_context_res {
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s32 res_num;
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s32 cur_res;
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struct ap1302_res_struct *res_table;
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};
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struct ap1302_device {
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struct v4l2_subdev sd;
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struct media_pad pad;
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struct camera_sensor_platform_data *platform_data;
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const struct firmware *fw;
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struct mutex input_lock; /* serialize sensor's ioctl */
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struct v4l2_mbus_framefmt format;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *run_mode;
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struct ap1302_context_config cntx_config[CONTEXT_NUM];
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struct ap1302_context_res cntx_res[CONTEXT_NUM];
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enum ap1302_contexts cur_context;
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unsigned int num_lanes;
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struct regmap *regmap16;
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struct regmap *regmap32;
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bool sys_activated;
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bool power_on;
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};
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struct ap1302_firmware {
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u32 crc;
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u32 pll_init_size;
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u32 total_size;
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u32 reserved;
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};
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struct ap1302_context_info {
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u16 offset;
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u16 len;
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char *name;
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};
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#endif
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