1686 lines
46 KiB
C
1686 lines
46 KiB
C
/*
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* Support for Omnivision OV8830 camera sensor.
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* Based on Aptina mt9e013 driver.
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*
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* Copyright (c) 2010 Intel Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#ifndef __OV8830_H__
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#define __OV8830_H__
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#include <linux/atomisp_platform.h>
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#include <linux/atomisp.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/videodev2.h>
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#include <linux/v4l2-mediabus.h>
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#include <linux/types.h>
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#include <media/media-entity.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-subdev.h>
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#define to_drv201_device(_sd) (&(container_of(_sd, struct ov8830_device, sd) \
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->drv201))
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#define DRV201_I2C_ADDR 0x0E
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#define DRV201_CONTROL 2
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#define DRV201_VCM_CURRENT 3
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#define DRV201_STATUS 5
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#define DRV201_MODE 6
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#define DRV201_VCM_FREQ 7
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#define DRV201_DEFAULT_VCM_FREQ 0xe6
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#define DRV201_MIN_DEFAULT_VCM_FREQ 0x00
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#define DRV201_MAX_DEFAULT_VCM_FREQ 0xff
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#define DRV201_MAX_FOCUS_POS 1023
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#define DRV201_MODE_LINEAR 2
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/* drv201 device structure */
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struct drv201_device {
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bool initialized; /* true if drv201 is detected */
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s32 focus; /* Current focus value */
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struct timespec focus_time; /* Time when focus was last time set */
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__u8 buffer[4]; /* Used for i2c transactions */
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const struct camera_af_platform_data *platform_data;
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};
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#define OV8830_NAME "ov8830"
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#define OV8830_ADDR 0x36
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#define OV8830_ID 0x4b00
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#define OV8830_CHIP_ID 0x8830
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#define OV8835_CHIP_ID 0x8835
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#define LAST_REG_SETING {0xffff, 0xff}
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#define is_last_reg_setting(item) ((item).reg == 0xffff)
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#define I2C_MSG_LENGTH 0x2
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#define OV8830_INVALID_CONFIG 0xffffffff
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#define OV8830_INTG_UNIT_US 100
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#define OV8830_MCLK 192
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#define OV8830_REG_BITS 16
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#define OV8830_REG_MASK 0xFFFF
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/* This should be added into include/linux/videodev2.h */
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#ifndef V4L2_IDENT_OV8830
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#define V4L2_IDENT_OV8830 8245
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#endif
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/*
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* ov8830 System control registers
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*/
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#define OV8830_PLL_PLL10 0x3090
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#define OV8830_PLL_PLL11 0x3091
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#define OV8830_PLL_PLL12 0x3092
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#define OV8830_PLL_PLL13 0x3093
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#define OV8830_TIMING_VTS 0x380e
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#define OV8830_TIMING_HTS 0x380C
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#define OV8830_HORIZONTAL_START_H 0x3800
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#define OV8830_HORIZONTAL_START_L 0x3801
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#define OV8830_VERTICAL_START_H 0x3802
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#define OV8830_VERTICAL_START_L 0x3803
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#define OV8830_HORIZONTAL_END_H 0x3804
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#define OV8830_HORIZONTAL_END_L 0x3805
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#define OV8830_VERTICAL_END_H 0x3806
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#define OV8830_VERTICAL_END_L 0x3807
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#define OV8830_HORIZONTAL_OUTPUT_SIZE_H 0x3808
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#define OV8830_HORIZONTAL_OUTPUT_SIZE_L 0x3809
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#define OV8830_VERTICAL_OUTPUT_SIZE_H 0x380a
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#define OV8830_VERTICAL_OUTPUT_SIZE_L 0x380b
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#define OV8830_SC_CMMN_CHIP_ID_H 0x0000
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#define OV8830_SC_CMMN_CHIP_ID_L 0x0001
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#define OV8830_GROUP_ACCESS 0x3208
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#define OV8830_GROUP_ACCESS_HOLD_START 0x00
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#define OV8830_GROUP_ACCESS_HOLD_END 0x10
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#define OV8830_GROUP_ACCESS_DELAY_LAUNCH 0xA0
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#define OV8830_GROUP_ACCESS_QUICK_LAUNCH 0xE0
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#define OV8830_LONG_EXPO 0x3500
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#define OV8830_AGC_ADJ 0x350B
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#define OV8830_TEST_PATTERN_MODE 0x3070
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/* ov8830 SCCB */
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#define OV8830_SCCB_CTRL 0x3100
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#define OV8830_AEC_PK_EXPO_H 0x3500
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#define OV8830_AEC_PK_EXPO_M 0x3501
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#define OV8830_AEC_PK_EXPO_L 0x3502
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#define OV8830_AEC_MANUAL_CTRL 0x3503
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#define OV8830_AGC_ADJ_H 0x3508
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#define OV8830_AGC_ADJ_L 0x3509
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#define OV8830_MWB_RED_GAIN_H 0x3400
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#define OV8830_MWB_GREEN_GAIN_H 0x3402
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#define OV8830_MWB_BLUE_GAIN_H 0x3404
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#define OV8830_MWB_GAIN_MAX 0x0fff
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#define OV8830_OTP_BANK0_PID 0x3d00
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#define OV8830_CHIP_ID_HIGH 0x300a
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#define OV8830_CHIP_ID_LOW 0x300b
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#define OV8830_STREAM_MODE 0x0100
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#define OV8830_FOCAL_LENGTH_NUM 439 /*4.39mm*/
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#define OV8830_FOCAL_LENGTH_DEM 100
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#define OV8830_F_NUMBER_DEFAULT_NUM 24
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#define OV8830_F_NUMBER_DEM 10
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#define OV8830_TIMING_X_INC 0x3814
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#define OV8830_TIMING_Y_INC 0x3815
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/* sensor_mode_data read_mode adaptation */
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#define OV8830_READ_MODE_BINNING_ON 0x0400
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#define OV8830_READ_MODE_BINNING_OFF 0x00
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#define OV8830_INTEGRATION_TIME_MARGIN 14
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#define OV8830_MAX_VTS_VALUE 0x7FFF
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#define OV8830_MAX_EXPOSURE_VALUE \
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(OV8830_MAX_VTS_VALUE - OV8830_INTEGRATION_TIME_MARGIN)
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#define OV8830_MAX_GAIN_VALUE 0xFF
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/*
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* focal length bits definition:
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* bits 31-16: numerator, bits 15-0: denominator
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*/
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#define OV8830_FOCAL_LENGTH_DEFAULT 0x1B70064
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/*
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* current f-number bits definition:
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* bits 31-16: numerator, bits 15-0: denominator
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*/
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#define OV8830_F_NUMBER_DEFAULT 0x18000a
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/*
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* f-number range bits definition:
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* bits 31-24: max f-number numerator
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* bits 23-16: max f-number denominator
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* bits 15-8: min f-number numerator
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* bits 7-0: min f-number denominator
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*/
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#define OV8830_F_NUMBER_RANGE 0x180a180a
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#define OTPM_ADD_START_1 0x1000
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#define OTPM_DATA_LENGTH_1 0x0100
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#define OTPM_COUNT 0x200
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/* Defines for register writes and register array processing */
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#define OV8830_BYTE_MAX 32
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#define OV8830_SHORT_MAX 16
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#define I2C_RETRY_COUNT 5
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#define OV8830_TOK_MASK 0xfff0
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#define OV8830_STATUS_POWER_DOWN 0x0
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#define OV8830_STATUS_STANDBY 0x2
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#define OV8830_STATUS_ACTIVE 0x3
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#define OV8830_STATUS_VIEWFINDER 0x4
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#define MAX_FPS_OPTIONS_SUPPORTED 3
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#define v4l2_format_capture_type_entry(_width, _height, \
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_pixelformat, _bytesperline, _colorspace) \
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{\
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.type = V4L2_BUF_TYPE_VIDEO_CAPTURE,\
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.fmt.pix.width = (_width),\
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.fmt.pix.height = (_height),\
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.fmt.pix.pixelformat = (_pixelformat),\
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.fmt.pix.bytesperline = (_bytesperline),\
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.fmt.pix.colorspace = (_colorspace),\
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.fmt.pix.sizeimage = (_height)*(_bytesperline),\
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}
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#define s_output_format_entry(_width, _height, _pixelformat, \
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_bytesperline, _colorspace, _fps) \
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{\
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.v4l2_fmt = v4l2_format_capture_type_entry(_width, \
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_height, _pixelformat, _bytesperline, \
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_colorspace),\
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.fps = (_fps),\
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}
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#define s_output_format_reg_entry(_width, _height, _pixelformat, \
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_bytesperline, _colorspace, _fps, _reg_setting) \
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{\
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.s_fmt = s_output_format_entry(_width, _height,\
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_pixelformat, _bytesperline, \
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_colorspace, _fps),\
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.reg_setting = (_reg_setting),\
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}
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struct s_ctrl_id {
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struct v4l2_queryctrl qc;
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int (*s_ctrl)(struct v4l2_subdev *sd, u32 val);
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int (*g_ctrl)(struct v4l2_subdev *sd, u32 *val);
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};
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#define v4l2_queryctrl_entry_integer(_id, _name,\
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_minimum, _maximum, _step, \
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_default_value, _flags) \
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{\
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.id = (_id), \
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.type = V4L2_CTRL_TYPE_INTEGER, \
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.name = _name, \
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.minimum = (_minimum), \
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.maximum = (_maximum), \
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.step = (_step), \
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.default_value = (_default_value),\
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.flags = (_flags),\
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}
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#define v4l2_queryctrl_entry_boolean(_id, _name,\
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_default_value, _flags) \
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{\
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.id = (_id), \
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.type = V4L2_CTRL_TYPE_BOOLEAN, \
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.name = _name, \
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.minimum = 0, \
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.maximum = 1, \
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.step = 1, \
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.default_value = (_default_value),\
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.flags = (_flags),\
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}
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#define s_ctrl_id_entry_integer(_id, _name, \
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_minimum, _maximum, _step, \
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_default_value, _flags, \
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_s_ctrl, _g_ctrl) \
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{\
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.qc = v4l2_queryctrl_entry_integer(_id, _name,\
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_minimum, _maximum, _step,\
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_default_value, _flags), \
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.s_ctrl = _s_ctrl, \
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.g_ctrl = _g_ctrl, \
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}
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#define s_ctrl_id_entry_boolean(_id, _name, \
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_default_value, _flags, \
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_s_ctrl, _g_ctrl) \
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{\
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.qc = v4l2_queryctrl_entry_boolean(_id, _name,\
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_default_value, _flags), \
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.s_ctrl = _s_ctrl, \
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.g_ctrl = _g_ctrl, \
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}
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#define macro_string_entry(VAL) \
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{ \
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.val = VAL, \
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.string = #VAL, \
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}
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enum ov8830_tok_type {
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OV8830_8BIT = 0x0001,
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OV8830_16BIT = 0x0002,
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OV8830_TOK_TERM = 0xf000, /* terminating token for reg list */
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OV8830_TOK_DELAY = 0xfe00 /* delay token for reg list */
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};
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/*
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* If register address or register width is not 32 bit width,
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* user needs to convert it manually
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*/
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struct s_register_setting {
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u32 reg;
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u32 val;
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};
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struct s_output_format {
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struct v4l2_format v4l2_fmt;
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int fps;
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};
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/**
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* struct ov8830_fwreg - Firmware burst command
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* @type: FW burst or 8/16 bit register
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* @addr: 16-bit offset to register or other values depending on type
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* @val: data value for burst (or other commands)
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*
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* Define a structure for sensor register initialization values
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*/
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struct ov8830_fwreg {
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enum ov8830_tok_type type; /* value, register or FW burst string */
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u16 addr; /* target address */
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u32 val[8];
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};
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/**
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* struct ov8830_reg - MI sensor register format
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* @type: type of the register
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* @reg: 16-bit offset to register
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* @val: 8/16/32-bit register value
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*
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* Define a structure for sensor register initialization values
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*/
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struct ov8830_reg {
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enum ov8830_tok_type type;
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union {
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u16 sreg;
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struct ov8830_fwreg *fwreg;
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} reg;
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u32 val; /* @set value for read/mod/write, @mask */
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u32 val2; /* optional: for rmw, OR mask */
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};
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struct ov8830_fps_setting {
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int fps;
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unsigned short pixels_per_line;
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unsigned short lines_per_frame;
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};
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/* Store macro values' debug names */
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struct macro_string {
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u8 val;
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char *string;
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};
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static inline const char *
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macro_to_string(const struct macro_string *array, int size, u8 val)
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{
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int i;
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for (i = 0; i < size; i++) {
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if (array[i].val == val)
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return array[i].string;
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}
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return "Unknown VAL";
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}
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struct ov8830_control {
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struct v4l2_queryctrl qc;
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int (*query)(struct v4l2_subdev *sd, s32 *value);
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int (*tweak)(struct v4l2_subdev *sd, s32 value);
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};
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struct ov8830_resolution {
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u8 *desc;
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int res;
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int width;
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int height;
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bool used;
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const struct ov8830_reg *regs;
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u8 bin_factor_x;
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u8 bin_factor_y;
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unsigned short skip_frames;
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const struct ov8830_fps_setting fps_options[MAX_FPS_OPTIONS_SUPPORTED];
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};
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struct ov8830_format {
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u8 *desc;
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u32 pixelformat;
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struct s_register_setting *regs;
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};
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/* ov8830 device structure */
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struct ov8830_device {
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struct v4l2_subdev sd;
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struct media_pad pad;
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struct v4l2_mbus_framefmt format;
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struct camera_sensor_platform_data *platform_data;
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int fmt_idx;
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int streaming;
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int power;
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u16 sensor_id;
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u8 sensor_revision;
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int exposure;
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int gain;
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u16 digital_gain;
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struct drv201_device drv201;
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struct mutex input_lock; /* serialize sensor's ioctl */
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const struct ov8830_reg *basic_settings_list;
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const struct ov8830_resolution *curr_res_table;
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int entries_curr_table;
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int fps_index;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *run_mode;
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};
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/*
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* The i2c adapter on Intel Medfield can transfer 32 bytes maximum
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* at a time. In burst mode we require that the buffer is transferred
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* in one shot, so limit the buffer size to 32 bytes minus a safety.
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*/
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#define OV8830_MAX_WRITE_BUF_SIZE 30
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struct ov8830_write_buffer {
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u16 addr;
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u8 data[OV8830_MAX_WRITE_BUF_SIZE];
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};
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struct ov8830_write_ctrl {
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int index;
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struct ov8830_write_buffer buffer;
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};
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#define OV8830_RES_WIDTH_MAX 3280
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#define OV8830_RES_HEIGHT_MAX 2464
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static const struct ov8830_reg ov8835_module_detection[] = {
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{ OV8830_8BIT, { OV8830_STREAM_MODE }, 0x01 }, /* Stream on */
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{ OV8830_8BIT, { 0x3d84 }, 0xc0 }, /* Select Bank 0 */
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{ OV8830_8BIT, { 0x3d81 }, 0x01 }, /* OTP read enable */
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{ OV8830_TOK_TERM, {0}, 0}
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};
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static const struct ov8830_reg ov8830_BasicSettings[] = {
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{ OV8830_8BIT, { 0x0103 }, 0x01 },
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{ OV8830_8BIT, { 0x0100 }, 0x00 },
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{ OV8830_8BIT, { 0x0102 }, 0x01 },
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{ OV8830_8BIT, { 0x3000 }, 0x00 },
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{ OV8830_8BIT, { 0x3001 }, 0x2a },
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{ OV8830_8BIT, { 0x3002 }, 0x88 },
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{ OV8830_8BIT, { 0x3003 }, 0x00 },
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{ OV8830_8BIT, { 0x3004 }, 0x00 },
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{ OV8830_8BIT, { 0x3005 }, 0x00 },
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{ OV8830_8BIT, { 0x3006 }, 0x00 },
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{ OV8830_8BIT, { 0x3007 }, 0x00 },
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{ OV8830_8BIT, { 0x3008 }, 0x00 },
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{ OV8830_8BIT, { 0x3009 }, 0x00 },
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{ OV8830_8BIT, { 0x3011 }, 0x41 },
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{ OV8830_8BIT, { 0x3012 }, 0x08 },
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{ OV8830_8BIT, { 0x3013 }, 0x10 },
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{ OV8830_8BIT, { 0x3014 }, 0x00 },
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{ OV8830_8BIT, { 0x3015 }, 0x08 },
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{ OV8830_8BIT, { 0x3016 }, 0xf0 },
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{ OV8830_8BIT, { 0x3017 }, 0xf0 },
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{ OV8830_8BIT, { 0x3018 }, 0xf0 },
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{ OV8830_8BIT, { 0x301b }, 0xb4 },
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{ OV8830_8BIT, { 0x301d }, 0x02 },
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{ OV8830_8BIT, { 0x3021 }, 0x00 },
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{ OV8830_8BIT, { 0x3022 }, 0x00 },
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{ OV8830_8BIT, { 0x3024 }, 0x00 },
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|
{ OV8830_8BIT, { 0x3026 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3027 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3081 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x3083 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3090 }, 0x01 }, /* PLL2 Settings SCLK 192mhZ*/
|
|
{ OV8830_8BIT, { 0x3091 }, 0x14 },
|
|
{ OV8830_8BIT, { 0x3094 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3092 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3093 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3098 }, 0x03 }, /* PLL3 Settings REF_CLK */
|
|
{ OV8830_8BIT, { 0x3099 }, 0x13 },
|
|
{ OV8830_8BIT, { 0x309a }, 0x00 },
|
|
{ OV8830_8BIT, { 0x309b }, 0x00 },
|
|
{ OV8830_8BIT, { 0x309c }, 0x01 },
|
|
{ OV8830_8BIT, { 0x30b3 }, 0x6b }, /* MIPI PLL1 Settings 684.4Mbps */
|
|
{ OV8830_8BIT, { 0x30b4 }, 0x03 },
|
|
{ OV8830_8BIT, { 0x30b5 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x30b6 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3104 }, 0xa1 },
|
|
{ OV8830_8BIT, { 0x3106 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3300 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3400 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3401 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3402 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3403 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3404 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3405 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3406 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3500 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3501 }, 0x30 },
|
|
{ OV8830_8BIT, { 0x3502 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3503 }, 0x07 },
|
|
{ OV8830_8BIT, { 0x3504 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3505 }, 0x30 },
|
|
{ OV8830_8BIT, { 0x3506 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3507 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3508 }, 0x80 },
|
|
{ OV8830_8BIT, { 0x3509 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x350a }, 0x00 },
|
|
{ OV8830_8BIT, { 0x350b }, 0x38 },
|
|
{ OV8830_8BIT, { 0x350c }, 0x00 },
|
|
{ OV8830_8BIT, { 0x350d }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3600 }, 0x78 },
|
|
/* Next 2 values As Per OV recomm. Only for OV8830 */
|
|
{ OV8830_8BIT, { 0x3601 }, 0x0a },
|
|
{ OV8830_8BIT, { 0x3602 }, 0x9c },
|
|
{ OV8830_8BIT, { 0x3604 }, 0x38 },
|
|
{ OV8830_8BIT, { 0x3620 }, 0x64 },
|
|
{ OV8830_8BIT, { 0x3621 }, 0xb5 },
|
|
{ OV8830_8BIT, { 0x3622 }, 0x03 },
|
|
{ OV8830_8BIT, { 0x3625 }, 0x64 },
|
|
{ OV8830_8BIT, { 0x3630 }, 0x55 },
|
|
{ OV8830_8BIT, { 0x3631 }, 0xd2 },
|
|
{ OV8830_8BIT, { 0x3632 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3633 }, 0x34 },
|
|
{ OV8830_8BIT, { 0x3634 }, 0x03 },
|
|
{ OV8830_8BIT, { 0x3660 }, 0x80 },
|
|
{ OV8830_8BIT, { 0x3662 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3665 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3666 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3667 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x366a }, 0x80 },
|
|
{ OV8830_8BIT, { 0x366c }, 0x00 },
|
|
{ OV8830_8BIT, { 0x366d }, 0x00 },
|
|
{ OV8830_8BIT, { 0x366e }, 0x00 },
|
|
{ OV8830_8BIT, { 0x366f }, 0x20 },
|
|
{ OV8830_8BIT, { 0x3680 }, 0xe0 },
|
|
{ OV8830_8BIT, { 0x3681 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3701 }, 0x14 },
|
|
{ OV8830_8BIT, { 0x3702 }, 0xbf },
|
|
{ OV8830_8BIT, { 0x3703 }, 0x8c },
|
|
{ OV8830_8BIT, { 0x3704 }, 0x78 },
|
|
{ OV8830_8BIT, { 0x3705 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x3708 }, 0xe4 },
|
|
{ OV8830_8BIT, { 0x3709 }, 0x03 },
|
|
{ OV8830_8BIT, { 0x370a }, 0x00 },
|
|
{ OV8830_8BIT, { 0x370b }, 0x20 },
|
|
{ OV8830_8BIT, { 0x370c }, 0x0c },
|
|
{ OV8830_8BIT, { 0x370d }, 0x11 },
|
|
{ OV8830_8BIT, { 0x370e }, 0x00 },
|
|
{ OV8830_8BIT, { 0x370f }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3710 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x371c }, 0x01 },
|
|
{ OV8830_8BIT, { 0x371f }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3721 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3724 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3726 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x372a }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3730 }, 0x18 },
|
|
{ OV8830_8BIT, { 0x3738 }, 0x22 },
|
|
{ OV8830_8BIT, { 0x3739 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x373a }, 0x51 },
|
|
{ OV8830_8BIT, { 0x373b }, 0x02 },
|
|
{ OV8830_8BIT, { 0x373c }, 0x20 },
|
|
{ OV8830_8BIT, { 0x373f }, 0x02 },
|
|
{ OV8830_8BIT, { 0x3740 }, 0x42 },
|
|
{ OV8830_8BIT, { 0x3741 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x3742 }, 0x18 },
|
|
{ OV8830_8BIT, { 0x3743 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3744 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x3747 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x374c }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3751 }, 0xf0 },
|
|
{ OV8830_8BIT, { 0x3752 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3753 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3754 }, 0xc0 },
|
|
{ OV8830_8BIT, { 0x3755 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3756 }, 0x1a },
|
|
{ OV8830_8BIT, { 0x3758 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3759 }, 0x0f },
|
|
{ OV8830_8BIT, { 0x375c }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3767 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x376b }, 0x44 },
|
|
{ OV8830_8BIT, { 0x3774 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3776 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x377f }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3780 }, 0x22 },
|
|
{ OV8830_8BIT, { 0x3781 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3784 }, 0x2c },
|
|
{ OV8830_8BIT, { 0x3785 }, 0x1e },
|
|
{ OV8830_8BIT, { 0x378f }, 0xf5 },
|
|
{ OV8830_8BIT, { 0x3791 }, 0xb0 },
|
|
{ OV8830_8BIT, { 0x3795 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3796 }, 0x64 },
|
|
{ OV8830_8BIT, { 0x3797 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3798 }, 0x30 },
|
|
{ OV8830_8BIT, { 0x3799 }, 0x41 },
|
|
{ OV8830_8BIT, { 0x379a }, 0x07 },
|
|
{ OV8830_8BIT, { 0x379b }, 0xb0 },
|
|
{ OV8830_8BIT, { 0x379c }, 0x0c },
|
|
{ OV8830_8BIT, { 0x37c0 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c1 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c2 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c3 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c4 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c5 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c6 }, 0xa0 },
|
|
{ OV8830_8BIT, { 0x37c7 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c8 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37c9 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37ca }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37cb }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37cc }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37cd }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37ce }, 0x01 },
|
|
{ OV8830_8BIT, { 0x37cf }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37d1 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x37de }, 0x00 },
|
|
{ OV8830_8BIT, { 0x37df }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_8BIT, { 0x3823 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3824 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3825 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3826 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3827 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x382a }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3a04 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3a05 }, 0xa9 },
|
|
{ OV8830_8BIT, { 0x3a06 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3a07 }, 0xf8 },
|
|
{ OV8830_8BIT, { 0x3a18 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3a19 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3b00 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3b01 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3b02 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3b03 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3b04 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3b05 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d00 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d01 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d02 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d03 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d04 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d05 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d06 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d07 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d08 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d09 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d0a }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d0b }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d0c }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d0d }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d0e }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d0f }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d80 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d81 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3d84 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3e07 }, 0x20 },
|
|
{ OV8830_8BIT, { 0x4000 }, 0x18 },
|
|
{ OV8830_8BIT, { 0x4001 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x4002 }, 0x45 },
|
|
{ OV8830_8BIT, { 0x4004 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x4005 }, 0x18 },
|
|
{ OV8830_8BIT, { 0x4006 }, 0x16 },
|
|
{ OV8830_8BIT, { 0x4008 }, 0x20 },
|
|
{ OV8830_8BIT, { 0x4009 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x400c }, 0x00 },
|
|
{ OV8830_8BIT, { 0x400d }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4058 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4101 }, 0x12 },
|
|
{ OV8830_8BIT, { 0x4104 }, 0x5b },
|
|
{ OV8830_8BIT, { 0x4303 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4304 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x4307 }, 0x30 },
|
|
{ OV8830_8BIT, { 0x4315 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4511 }, 0x05 },
|
|
{ OV8830_8BIT, { 0x4512 }, 0x01 }, /* Binning option = Average */
|
|
{ OV8830_8BIT, { 0x4750 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4751 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4752 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4753 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x4805 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x4806 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x481f }, 0x36 },
|
|
{ OV8830_8BIT, { 0x4831 }, 0x6c },
|
|
{ OV8830_8BIT, { 0x4837 }, 0x0c }, /* MIPI global timing */
|
|
{ OV8830_8BIT, { 0x4a00 }, 0xaa },
|
|
{ OV8830_8BIT, { 0x4a03 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x4a05 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x4a0a }, 0x88 },
|
|
{ OV8830_8BIT, { 0x5000 }, 0x06 },
|
|
{ OV8830_8BIT, { 0x5001 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x5002 }, 0x80 },
|
|
{ OV8830_8BIT, { 0x5003 }, 0x20 },
|
|
{ OV8830_8BIT, { 0x5013 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x5046 }, 0x4a },
|
|
{ OV8830_8BIT, { 0x5780 }, 0x1c },
|
|
{ OV8830_8BIT, { 0x5786 }, 0x20 },
|
|
{ OV8830_8BIT, { 0x5787 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x5788 }, 0x18 },
|
|
{ OV8830_8BIT, { 0x578a }, 0x04 },
|
|
{ OV8830_8BIT, { 0x578b }, 0x02 },
|
|
{ OV8830_8BIT, { 0x578c }, 0x02 },
|
|
{ OV8830_8BIT, { 0x578e }, 0x06 },
|
|
{ OV8830_8BIT, { 0x578f }, 0x02 },
|
|
{ OV8830_8BIT, { 0x5790 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x5791 }, 0xff },
|
|
{ OV8830_8BIT, { 0x5a08 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x5e00 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x5e10 }, 0x0c },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
/*****************************STILL********************************/
|
|
|
|
static const struct ov8830_reg ov8830_cont_cap_720P[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x40 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xe3 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0x75 },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x05 }, /* Output size 1296x736 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x02 },
|
|
{ OV8830_8BIT, { 0x380b }, 0xe0 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 }, /* Binning on */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_1080P_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x40 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xe3 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0x75 },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x07 }, /* Output size 1936x1104 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x90 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x04 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x50 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 }, /* Binning off */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_cont_cap_qvga[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xab },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x01 }, /* O/p 336x256 Bin+skip+scale */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x50 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x01 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x71 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x71 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 }, /* Binning+skipping on */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_VGA_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xab },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x02 }, /* Ouput Size 656x496 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x90 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x01 },
|
|
{ OV8830_8BIT, { 0x380b }, 0xf0 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 }, /* Binning on */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_1M_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xab },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x04 }, /* Ouput Size 1040x784 1229x922 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x03 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 }, /* Binning off */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_2M_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xab },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x06 }, /* Ouput Size 1640x1232 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x68 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x04 },
|
|
{ OV8830_8BIT, { 0x380b }, 0xd0 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 }, /* Binning off */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_3M_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xab },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x08 }, /* Ouput Size 2064x1552 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x06 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 }, /* Binning off */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_5M_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xab },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x0a }, /* Ouput Size 2576x1936 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x07 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x90 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 }, /* Binning off */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_6M_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x36 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0x79 }, /* Read Array: 3291 x 2169 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x0c }, /* Output size 3280x1852 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0xd0 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x07 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x3c },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 }, /* Binning off */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_8M_STILL[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xdb },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xab },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x0c }, /* Output size 3280x2464 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0xd0 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x09 },
|
|
{ OV8830_8BIT, { 0x380b }, 0xa0 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 }, /* Binning off */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
/*****************************OV8830 PREVIEW********************************/
|
|
|
|
static struct ov8830_reg const ov8830_PREVIEW_848x616[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd7 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 }, /* 8, 3287, 8, 2471 Binning*/
|
|
{ OV8830_8BIT, { 0x3807 }, 0xa7 }, /* Actual Size 3280x2464 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x03 },
|
|
{ OV8830_8BIT, { 0x3809 }, 0x50 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x02 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x68 }, /* O/p 848x616 Binning+Scaling */
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 }, /* Vertical Binning 0n */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f }, /* Horizontal Binning 0n */
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov8830_reg const ov8830_PREVIEW_WIDE_PREVIEW[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x40 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd3 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0x73 }, /* 3268x1840 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x05 },
|
|
{ OV8830_8BIT, { 0x3809 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x02 },
|
|
{ OV8830_8BIT, { 0x380b }, 0xd0 }, /* 1280X720*/
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 }, /* Binning on */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov8830_reg const ov8830_PREVIEW_1632x1224[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd7 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0xa7 }, /* Actual Size 3280x2464 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x06 },
|
|
{ OV8830_8BIT, { 0x3809 }, 0x60 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x04 },
|
|
{ OV8830_8BIT, { 0x380b }, 0xc8 }, /* Output size: 1632x1224 */
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 }, /* Vertical Binning 0n */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f }, /* Horizontal Binning 0n */
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
/***************** OV8830 VIDEO ***************************************/
|
|
|
|
static const struct ov8830_reg ov8830_QCIF_strong_dvs[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd7 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 }, /* 8, 3287, 8, 2471 Binning on*/
|
|
{ OV8830_8BIT, { 0x3807 }, 0xa7 }, /* Actual Size 3280x2464 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x00 }, /* O/p Binning + Scaling 216x176 */
|
|
{ OV8830_8BIT, { 0x3809 }, 0xd8 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x00 },
|
|
{ OV8830_8BIT, { 0x380b }, 0xb0 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_QVGA_strong_dvs[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd7 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 }, /* 8, 3287, 8, 2471 Binning on*/
|
|
{ OV8830_8BIT, { 0x3807 }, 0xa7 }, /* Actual Size 3280x2464 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x01 }, /* 408x308 Binning+Scaling */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x98 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x01 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x34 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_VGA_strong_dvs[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd7 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x09 }, /* 8, 3287, 8, 2471 Binning on*/
|
|
{ OV8830_8BIT, { 0x3807 }, 0xa7 }, /* Actual Size 3280x2464 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x03 }, /* 820x616 Binning + Scaling */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x34 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x02 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x68 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov8830_reg const ov8830_480p_strong_dvs[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x09 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x40 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0b },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd6 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0x73 }, /* TODO! 2766 x 1844 */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x03 }, /* 936x602 Binning + Scaling */
|
|
{ OV8830_8BIT, { 0x3809 }, 0xa8 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x02 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x5a },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 }, /* Binning on */
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov8830_reg const ov8830_720p_strong_dvs[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x40 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0c },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xd3 },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x08 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0x73 },
|
|
{ OV8830_8BIT, { 0x3808 }, 0x06 }, /* O/p 1568*880 Bin+Scale */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x20 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x03 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x70 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x31 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0f },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static const struct ov8830_reg ov8830_1080p_strong_dvs[] = {
|
|
{ OV8830_8BIT, { 0x3800 }, 0x01 },
|
|
{ OV8830_8BIT, { 0x3801 }, 0xd8 },
|
|
{ OV8830_8BIT, { 0x3802 }, 0x02 },
|
|
{ OV8830_8BIT, { 0x3803 }, 0x36 },
|
|
{ OV8830_8BIT, { 0x3804 }, 0x0a },
|
|
{ OV8830_8BIT, { 0x3805 }, 0xff },
|
|
{ OV8830_8BIT, { 0x3806 }, 0x07 },
|
|
{ OV8830_8BIT, { 0x3807 }, 0x65 }, /* 2344 x 1328 Crop */
|
|
{ OV8830_8BIT, { 0x3808 }, 0x09 }, /* 2336x1320 DVS O/p */
|
|
{ OV8830_8BIT, { 0x3809 }, 0x20 },
|
|
{ OV8830_8BIT, { 0x380a }, 0x05 },
|
|
{ OV8830_8BIT, { 0x380b }, 0x28 },
|
|
{ OV8830_8BIT, { 0x3810 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3811 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3812 }, 0x00 },
|
|
{ OV8830_8BIT, { 0x3813 }, 0x04 },
|
|
{ OV8830_8BIT, { 0x3814 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3815 }, 0x11 },
|
|
{ OV8830_8BIT, { 0x3820 }, 0x10 },
|
|
{ OV8830_8BIT, { 0x3821 }, 0x0e },
|
|
{ OV8830_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov8830_resolution ov8830_res_preview[] = {
|
|
{
|
|
.desc = "OV8830_PREVIEW_848x616",
|
|
.width = 848,
|
|
.height = 616,
|
|
.used = 0,
|
|
.regs = ov8830_PREVIEW_848x616,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 3608,
|
|
.lines_per_frame = 2773,
|
|
},
|
|
{
|
|
}
|
|
}
|
|
},
|
|
{
|
|
.desc = "ov8830_wide_preview",
|
|
.width = 1280,
|
|
.height = 720,
|
|
.used = 0,
|
|
.regs = ov8830_PREVIEW_WIDE_PREVIEW,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 3608,
|
|
.lines_per_frame = 2773,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_qvga",
|
|
.width = 336,
|
|
.height = 256,
|
|
.used = 0,
|
|
.regs = ov8830_cont_cap_qvga,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_vga",
|
|
.width = 656,
|
|
.height = 496,
|
|
.used = 0,
|
|
.regs = ov8830_VGA_STILL,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
}
|
|
},
|
|
{
|
|
.desc = "OV8830_PREVIEW1600x1200",
|
|
.width = 1632,
|
|
.height = 1224,
|
|
.used = 0,
|
|
.regs = ov8830_PREVIEW_1632x1224,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 3608,
|
|
.lines_per_frame = 2773,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_720P",
|
|
.width = 1296,
|
|
.height = 736,
|
|
.used = 0,
|
|
.regs = ov8830_cont_cap_720P,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_1M",
|
|
.width = 1040,
|
|
.height = 784,
|
|
.used = 0,
|
|
.regs = ov8830_1M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_1080P",
|
|
.width = 1936,
|
|
.height = 1104,
|
|
.used = 0,
|
|
.regs = ov8830_1080P_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_3M",
|
|
.width = 2064,
|
|
.height = 1552,
|
|
.used = 0,
|
|
.regs = ov8830_3M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_5M",
|
|
.width = 2576,
|
|
.height = 1936,
|
|
.used = 0,
|
|
.regs = ov8830_5M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_6M",
|
|
.width = 3280,
|
|
.height = 1852,
|
|
.used = 0,
|
|
.regs = ov8830_6M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "ov8830_cont_cap_8M",
|
|
.width = 3280,
|
|
.height = 2464,
|
|
.used = 0,
|
|
.regs = ov8830_8M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4464,
|
|
.lines_per_frame = 2867,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
};
|
|
|
|
static struct ov8830_resolution ov8830_res_still[] = {
|
|
{
|
|
.desc = "STILL_VGA",
|
|
.width = 656,
|
|
.height = 496,
|
|
.used = 0,
|
|
.regs = ov8830_VGA_STILL,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "STILL_1080P",
|
|
.width = 1936,
|
|
.height = 1104,
|
|
.used = 0,
|
|
.regs = ov8830_1080P_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "STILL_1M",
|
|
.width = 1040,
|
|
.height = 784,
|
|
.used = 0,
|
|
.regs = ov8830_1M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "STILL_2M",
|
|
.width = 1640,
|
|
.height = 1232,
|
|
.used = 0,
|
|
.regs = ov8830_2M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "STILL_3M",
|
|
.width = 2064,
|
|
.height = 1552,
|
|
.used = 0,
|
|
.regs = ov8830_3M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "STILL_5M",
|
|
.width = 2576,
|
|
.height = 1936,
|
|
.used = 0,
|
|
.regs = ov8830_5M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "STILL_6M",
|
|
.width = 3280,
|
|
.height = 1852,
|
|
.used = 0,
|
|
.regs = ov8830_6M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4696,
|
|
.lines_per_frame = 2724,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "STILL_8M",
|
|
.width = 3280,
|
|
.height = 2464,
|
|
.used = 0,
|
|
.regs = ov8830_8M_STILL,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 1,
|
|
.fps_options = {
|
|
{
|
|
.fps = 15,
|
|
.pixels_per_line = 4464,
|
|
.lines_per_frame = 2867,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
};
|
|
|
|
static struct ov8830_resolution ov8830_res_video[] = {
|
|
{
|
|
.desc = "QCIF_strong_dvs",
|
|
.width = 216,
|
|
.height = 176,
|
|
.used = 0,
|
|
.regs = ov8830_QCIF_strong_dvs,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 4128,
|
|
.lines_per_frame = 1550,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "QVGA_strong_dvs",
|
|
.width = 408,
|
|
.height = 308,
|
|
.used = 0,
|
|
.regs = ov8830_QVGA_strong_dvs,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 4128,
|
|
.lines_per_frame = 1550,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "VGA_strong_dvs",
|
|
.width = 820,
|
|
.height = 616,
|
|
.used = 0,
|
|
.regs = ov8830_VGA_strong_dvs,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 4128,
|
|
.lines_per_frame = 1550,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "480p_strong_dvs",
|
|
.width = 936,
|
|
.height = 602,
|
|
.regs = ov8830_480p_strong_dvs,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 4128,
|
|
.lines_per_frame = 1550,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "720p_strong_dvs",
|
|
.width = 1568,
|
|
.height = 880,
|
|
.used = 0,
|
|
.regs = ov8830_720p_strong_dvs,
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 4128,
|
|
.lines_per_frame = 1550,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
{
|
|
.desc = "MODE1920x1080",
|
|
.width = 2336,
|
|
.height = 1320,
|
|
.used = 0,
|
|
.regs = ov8830_1080p_strong_dvs,
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.skip_frames = 0,
|
|
.fps_options = {
|
|
{
|
|
.fps = 30,
|
|
.pixels_per_line = 4100,
|
|
.lines_per_frame = 1561,
|
|
},
|
|
{
|
|
}
|
|
},
|
|
},
|
|
};
|
|
|
|
#endif
|