1458 lines
49 KiB
C
1458 lines
49 KiB
C
/*
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* Support for Sony OV9724 camera sensor.
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*
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* Copyright (c) 2010 Intel Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#ifndef __OV9724_H__
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#define __OV9724_H__
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#include <linux/atomisp_platform.h>
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#include <linux/atomisp.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/videodev2.h>
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#include <linux/v4l2-mediabus.h>
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#include <media/media-entity.h>
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#include <media/v4l2-chip-ident.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-subdev.h>
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#define OV9724_NAME "ov9724"
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#define V4L2_IDENT_OV9724 8245
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/* Defines for register writes and register array processing */
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#define OV9724_BYTE_MAX 30
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#define OV9724_SHORT_MAX 16
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#define I2C_MSG_LENGTH 0x2
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#define I2C_RETRY_COUNT 5
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#define OV9724_READ_MODE 0x3820
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#define OV9724_TEST_PATTERN_MODE 0x0601
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#define OV9724_HFLIP_BIT 0x1
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#define OV9724_VFLIP_BIT 0x2
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#define OV9724_VFLIP_OFFSET 1
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#define OV9724_IMG_ORIENTATION 0x0101
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#define I2C_RETRY_COUNT 5
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#define MAX_FMTS 1
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#define OV9724_PID_LOW 0x1
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#define OV9724_PID_HIGH 0x0
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#define OV9724_REV 0x2
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#define OV9724_MOD_ID 0x9724
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#define OV9724_RES_WIDTH_MAX 1296
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#define OV9724_RES_HEIGHT_MAX 736
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#define OV9724_FOCAL_LENGTH_NUM 166 /*1.66mm*/
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#define OV9724_FOCAL_LENGTH_DEM 100
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#define OV9724_F_NUMBER_DEFAULT_NUM 280
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#define OV9724_F_NUMBER_DEM 100
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#define OV9724_COARSE_INTEGRATION_TIME 0x0202
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#define OV9724_GLOBAL_GAIN 0x0205
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#define OV9724_INTG_BUF_COUNT 2
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#define OV9724_VT_PIX_CLK_DIV 0x0300
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#define OV9724_VT_SYS_CLK_DIV 0x0302
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#define OV9724_PRE_PLL_CLK_DIV 0x0304
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#define OV9724_PLL_MULTIPLIER 0x0306
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#define OV9724_OP_PIX_DIV 0x0300
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#define OV9724_OP_SYS_DIV 0x0302
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#define OV9724_FRAME_LENGTH_LINES 0x0340
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#define OV9724_COARSE_INTG_TIME_MIN 0x1004
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#define OV9724_FINE_INTG_TIME_MIN 0x1008
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#define OV9724_BIN_FACTOR_MAX 1
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#define OV9724_MCLK 192
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#define OV9724_HORIZONTAL_START_H 0x0344
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#define OV9724_VERTICAL_START_H 0x0346
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#define OV9724_HORIZONTAL_END_H 0x0348
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#define OV9724_VERTICAL_END_H 0x034a
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#define OV9724_HORIZONTAL_OUTPUT_SIZE_H 0x034c
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#define OV9724_VERTICAL_OUTPUT_SIZE_H 0x034e
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/*
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* focal length bits definition:
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* bits 31-16: numerator, bits 15-0: denominator
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*/
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#define OV9724_FOCAL_LENGTH_DEFAULT 0xA60064
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/*
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* current f-number bits definition:
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* bits 31-16: numerator, bits 15-0: denominator
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*/
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#define OV9724_F_NUMBER_DEFAULT 0x1200064
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/*
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* f-number range bits definition:
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* bits 31-24: max f-number numerator
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* bits 23-16: max f-number denominator
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* bits 15-8: min f-number numerator
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* bits 7-0: min f-number denominator
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*/
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#define OV9724_F_NUMBER_RANGE 0x1D0a1D0a
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#define v4l2_format_capture_type_entry(_width, _height, \
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_pixelformat, _bytesperline, _colorspace) \
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{\
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.type = V4L2_BUF_TYPE_VIDEO_CAPTURE,\
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.fmt.pix.width = (_width),\
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.fmt.pix.height = (_height),\
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.fmt.pix.pixelformat = (_pixelformat),\
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.fmt.pix.bytesperline = (_bytesperline),\
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.fmt.pix.colorspace = (_colorspace),\
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.fmt.pix.sizeimage = (_height)*(_bytesperline),\
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}
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#define s_output_format_entry(_width, _height, _pixelformat, \
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_bytesperline, _colorspace, _fps) \
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{\
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.v4l2_fmt = v4l2_format_capture_type_entry(_width, \
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_height, _pixelformat, _bytesperline, \
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_colorspace),\
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.fps = (_fps),\
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}
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#define s_output_format_reg_entry(_width, _height, _pixelformat, \
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_bytesperline, _colorspace, _fps, _reg_setting) \
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{\
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.s_fmt = s_output_format_entry(_width, _height,\
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_pixelformat, _bytesperline, \
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_colorspace, _fps),\
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.reg_setting = (_reg_setting),\
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}
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struct s_ctrl_id {
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struct v4l2_queryctrl qc;
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int (*s_ctrl)(struct v4l2_subdev *sd, u32 val);
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int (*g_ctrl)(struct v4l2_subdev *sd, u32 *val);
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};
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#define v4l2_queryctrl_entry_integer(_id, _name,\
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_minimum, _maximum, _step, \
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_default_value, _flags) \
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{\
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.id = (_id), \
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.type = V4L2_CTRL_TYPE_INTEGER, \
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.name = _name, \
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.minimum = (_minimum), \
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.maximum = (_maximum), \
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.step = (_step), \
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.default_value = (_default_value),\
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.flags = (_flags),\
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}
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#define v4l2_queryctrl_entry_boolean(_id, _name,\
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_default_value, _flags) \
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{\
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.id = (_id), \
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.type = V4L2_CTRL_TYPE_BOOLEAN, \
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.name = _name, \
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.minimum = 0, \
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.maximum = 1, \
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.step = 1, \
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.default_value = (_default_value),\
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.flags = (_flags),\
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}
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#define s_ctrl_id_entry_integer(_id, _name, \
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_minimum, _maximum, _step, \
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_default_value, _flags, \
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_s_ctrl, _g_ctrl) \
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{\
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.qc = v4l2_queryctrl_entry_integer(_id, _name,\
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_minimum, _maximum, _step,\
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_default_value, _flags), \
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.s_ctrl = _s_ctrl, \
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.g_ctrl = _g_ctrl, \
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}
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#define s_ctrl_id_entry_boolean(_id, _name, \
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_default_value, _flags, \
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_s_ctrl, _g_ctrl) \
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{\
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.qc = v4l2_queryctrl_entry_boolean(_id, _name,\
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_default_value, _flags), \
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.s_ctrl = _s_ctrl, \
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.g_ctrl = _g_ctrl, \
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}
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enum ov9724_tok_type {
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OV9724_8BIT = 0x0001,
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OV9724_16BIT = 0x0002,
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OV9724_RMW = 0x0010,
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OV9724_TOK_TERM = 0xf000, /* terminating token for reg list */
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OV9724_TOK_DELAY = 0xfe00, /* delay token for reg list */
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OV9724_TOK_MASK = 0xfff0
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};
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/*
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* If register address or register width is not 32 bit width,
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* user needs to convert it manually
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*/
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struct s_register_setting {
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u32 reg;
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u32 val;
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};
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struct s_output_format {
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struct v4l2_format v4l2_fmt;
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int fps;
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};
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/**
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* struct ov9724_fwreg - Fisare burst command
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* @type: FW burst or 8/16 bit register
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* @addr: 16-bit offset to register or other values depending on type
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* @val: data value for burst (or other commands)
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*
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* Define a structure for sensor register initialization values
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*/
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struct ov9724_fwreg {
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enum ov9724_tok_type type; /* value, register or FW burst string */
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u16 addr; /* target address */
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u32 val[8];
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};
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/**
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* struct ov9724_reg - MI sensor register format
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* @type: type of the register
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* @reg: 16-bit offset to register
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* @val: 8/16/32-bit register value
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*
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* Define a structure for sensor register initialization values
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*/
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struct ov9724_reg {
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enum ov9724_tok_type type;
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union {
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u16 sreg;
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struct ov9724_fwreg *fwreg;
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} reg;
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u32 val; /* @set value for read/mod/write, @mask */
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};
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#define to_ov9724_sensor(x) container_of(x, struct ov9724_device, sd)
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#define OV9724_MAX_WRITE_BUF_SIZE 30
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struct ov9724_write_buffer {
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u16 addr;
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u8 data[OV9724_MAX_WRITE_BUF_SIZE];
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};
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struct ov9724_write_ctrl {
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int index;
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struct ov9724_write_buffer buffer;
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};
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struct ov9724_device {
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struct v4l2_subdev sd;
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struct media_pad pad;
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struct v4l2_mbus_framefmt format;
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struct camera_sensor_platform_data *platform_data;
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struct mutex input_lock; /* serialize sensor's ioctl */
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int fmt_idx;
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int status;
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int streaming;
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int power;
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int run_mode;
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int vt_pix_clk_freq_mhz;
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u16 sensor_id;
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u16 coarse_itg;
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u16 fine_itg;
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u16 gain;
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u16 pixels_per_line;
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u16 lines_per_frame;
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u8 fps;
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u8 res;
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u8 type;
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u8 sensor_revision;
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};
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struct ov9724_format_struct {
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u8 *desc;
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struct regval_list *regs;
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u32 pixelformat;
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};
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struct ov9724_resolution {
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u8 *desc;
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const struct ov9724_reg *regs;
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int res;
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int width;
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int height;
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int fps;
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unsigned short pixels_per_line;
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unsigned short lines_per_frame;
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u8 bin_factor_x;
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u8 bin_factor_y;
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bool used;
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u32 skip_frames;
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};
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struct ov9724_control {
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struct v4l2_queryctrl qc;
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int (*query)(struct v4l2_subdev *sd, s32 *value);
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int (*tweak)(struct v4l2_subdev *sd, int value);
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};
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/************************** settings for ov9724 *************************/
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static struct ov9724_reg const ov9724_1040_592_30fps[] = {
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{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
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{OV9724_8BIT, {0x0345}, 0x7e},/* Horizontal start - Low */
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{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
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{OV9724_8BIT, {0x0347}, 0x44},/* Vertical start - Low */
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{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
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{OV9724_8BIT, {0x0349}, 0x8d},/* Horizontal end - Low */
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{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
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{OV9724_8BIT, {0x034b}, 0x97},/* Vertical end - Low */
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{OV9724_8BIT, {0x034c}, 0x04},/* Image width - Hi */
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{OV9724_8BIT, {0x034d}, 0x10},/* Image width - Low */
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{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
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{OV9724_8BIT, {0x034f}, 0x50},/* Image Height - Low */
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{OV9724_8BIT, {0x4908}, 0x14},
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{OV9724_8BIT, {0x4909}, 0x08},
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{OV9724_8BIT, {0x3811}, 0x0a},
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{OV9724_8BIT, {0x3813}, 0x04},
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{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
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{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
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{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
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{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
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{OV9724_8BIT, {0x0301}, 0x0a},
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{OV9724_8BIT, {0x0303}, 0x02},
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{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
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{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
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{OV9724_8BIT, {0x0310}, 0x00},
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{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
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{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
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{OV9724_8BIT, {0x0205}, 0x3f},
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{OV9724_8BIT, {0x0383}, 0x01},
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{OV9724_8BIT, {0x4501}, 0x08},
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{OV9724_8BIT, {0x0385}, 0x01},
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{OV9724_8BIT, {0x0387}, 0x01},
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{OV9724_8BIT, {0x3821}, 0x00},
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{OV9724_8BIT, {0x4501}, 0x08},
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{OV9724_8BIT, {0x3820}, 0xa0},
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{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
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{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
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{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
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{OV9724_8BIT, {0x4307}, 0x3a},
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{OV9724_8BIT, {0x370a}, 0x23},
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{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
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{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
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{OV9724_TOK_TERM, {0}, 0}
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};
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static struct ov9724_reg const ov9724_736_496_30fps[] = {
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{OV9724_8BIT, {0x0344}, 0x01},/* Horizontal start - Hi */
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{OV9724_8BIT, {0x0345}, 0x1e},/* Horizontal start - Low */
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{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
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{OV9724_8BIT, {0x0347}, 0x98},/* Vertical start - Low */
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{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
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{OV9724_8BIT, {0x0349}, 0x55},/* Horizontal end - Low */
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{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
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{OV9724_8BIT, {0x034b}, 0x9b},/* Vertical end - Low */
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{OV9724_8BIT, {0x034c}, 0x02},/* Image width - Hi */
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{OV9724_8BIT, {0x034d}, 0xe0},/* Image width - Low */
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{OV9724_8BIT, {0x034e}, 0x01},/* Image Height - Hi */
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{OV9724_8BIT, {0x034f}, 0xf0},/* Image Height - Low */
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{OV9724_8BIT, {0x4908}, 0x14},
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{OV9724_8BIT, {0x4909}, 0x08},
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{OV9724_8BIT, {0x3811}, 0x0a},
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{OV9724_8BIT, {0x3813}, 0x04},
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{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
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{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
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{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
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{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
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{OV9724_8BIT, {0x0301}, 0x0a},
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{OV9724_8BIT, {0x0303}, 0x02},
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{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
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{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
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{OV9724_8BIT, {0x0310}, 0x00},
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{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
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{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
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{OV9724_8BIT, {0x0205}, 0x3f},
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{OV9724_8BIT, {0x0383}, 0x01},
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{OV9724_8BIT, {0x4501}, 0x08},
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{OV9724_8BIT, {0x0385}, 0x01},
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{OV9724_8BIT, {0x0387}, 0x01},
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{OV9724_8BIT, {0x3821}, 0x00},
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{OV9724_8BIT, {0x4501}, 0x08},
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{OV9724_8BIT, {0x3820}, 0xa0},
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{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
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{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
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{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
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{OV9724_8BIT, {0x4307}, 0x3a},
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{OV9724_8BIT, {0x370a}, 0x23},
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{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
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{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
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{OV9724_TOK_TERM, {0}, 0}
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};
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static struct ov9724_reg const ov9724_656_496_30fps[] = {
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{OV9724_8BIT, {0x0344}, 0x01},/* Horizontal start - Hi */
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{OV9724_8BIT, {0x0345}, 0x1e},/* Horizontal start - Low */
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{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
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{OV9724_8BIT, {0x0347}, 0x98},/* Vertical start - Low */
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{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
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{OV9724_8BIT, {0x0349}, 0x55},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0x9b},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x02},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x90},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x01},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xf0},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_368_304_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x00},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0xff},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xcf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x01},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x70},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x01},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x30},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x20},
|
|
{OV9724_8BIT, {0x4909}, 0x14},
|
|
{OV9724_8BIT, {0x3811}, 0xf8},
|
|
{OV9724_8BIT, {0x3813}, 0x3e},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x03},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x03},
|
|
{OV9724_8BIT, {0x3821}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x3820}, 0xa1},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
static struct ov9724_reg const ov9724_336_256_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x10},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x14},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0xff},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xcf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x01},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x50},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x01},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x00},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x20},
|
|
{OV9724_8BIT, {0x4909}, 0x14},
|
|
{OV9724_8BIT, {0x3811}, 0xf8},
|
|
{OV9724_8BIT, {0x3813}, 0x3e},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x03},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x03},
|
|
{OV9724_8BIT, {0x3821}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x3820}, 0xa1},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
static struct ov9724_reg const ov9724_848_616_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0xe6},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x34},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x55},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0x9b},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x03},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x50},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x68},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
static struct ov9724_reg const ov9724_444_348_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x00},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0xff},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xcf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x01},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0xc0},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x01},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x5c},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x20},
|
|
{OV9724_8BIT, {0x4909}, 0x14},
|
|
{OV9724_8BIT, {0x3811}, 0x10},
|
|
{OV9724_8BIT, {0x3813}, 0x0a},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x03},
|
|
{OV9724_8BIT, {0x3821}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x3820}, 0xa1},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
static struct ov9724_reg const ov9724_936_602_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0xae},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x44},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x9d},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xa6},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x03},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0xa8},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x5a},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_720p_15fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x00},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x05},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x0b},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xdb},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x05},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x0c},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xdc},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x05},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0xf0},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x06},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x28},/* Horizontal length - Low */
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x02},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0xf0},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},/* Analog gain - Low */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_960x720_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0xa0},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x6f},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xdf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x03},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0xd0},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xe0},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x10},
|
|
{OV9724_8BIT, {0x4909}, 0x04},
|
|
{OV9724_8BIT, {0x3811}, 0x08},
|
|
{OV9724_8BIT, {0x3813}, 0x02},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
|
|
static struct ov9724_reg const ov9724_720p_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x00},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x05},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x0f},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xdf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x05},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x10},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xe0},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x10},
|
|
{OV9724_8BIT, {0x4909}, 0x04},
|
|
{OV9724_8BIT, {0x3811}, 0x08},
|
|
{OV9724_8BIT, {0x3813}, 0x02},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_D1NTSC_strong_dvs_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0xae},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x44},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x9d},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xa6},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x03},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x88},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x5a},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_D1PAL_strong_dvs_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0xc8},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x06},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x37},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xc9},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x03},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x70},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xc4},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4801}, 0x8f},/* Mipi ctrl01 */
|
|
{OV9724_8BIT, {0x4814}, 0x2b},/* Mipi ctrl14 */
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},/* Isp ctrl0 */
|
|
{OV9724_8BIT, {0x5001}, 0x73},/* Isp ctrl1 */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_VGA_strong_dvs_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0xe6},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x34},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x55},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0x9b},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x03},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x34},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x68},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},
|
|
{OV9724_8BIT, {0x4801}, 0x8f},
|
|
{OV9724_8BIT, {0x4814}, 0x2b},
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},
|
|
{OV9724_8BIT, {0x5001}, 0x73},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_WIDE_PREVIEW_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x7e},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x44},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0x8d},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0x97},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x04},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x10},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x02},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x54},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x14},
|
|
{OV9724_8BIT, {0x4909}, 0x08},
|
|
{OV9724_8BIT, {0x3811}, 0x0a},
|
|
{OV9724_8BIT, {0x3813}, 0x04},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x01},
|
|
{OV9724_8BIT, {0x3821}, 0x00},
|
|
{OV9724_8BIT, {0x4501}, 0x08},
|
|
{OV9724_8BIT, {0x3820}, 0xa0},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},
|
|
{OV9724_8BIT, {0x4801}, 0x8f},
|
|
{OV9724_8BIT, {0x4814}, 0x2b},
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},
|
|
{OV9724_8BIT, {0x5001}, 0x73},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
|
|
static struct ov9724_reg const ov9724_QVGA_strong_dvs_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x00},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0xff},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xcf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x01},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0x98},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x01},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0x34},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x20},
|
|
{OV9724_8BIT, {0x4909}, 0x14},
|
|
{OV9724_8BIT, {0x3811}, 0xf8},
|
|
{OV9724_8BIT, {0x3813}, 0x3e},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x03},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x0385}, 0x01},
|
|
{OV9724_8BIT, {0x0387}, 0x03},
|
|
{OV9724_8BIT, {0x3821}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x3820}, 0xa1},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},
|
|
{OV9724_8BIT, {0x4801}, 0x8f},
|
|
{OV9724_8BIT, {0x4814}, 0x2b},
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0x23},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},
|
|
{OV9724_8BIT, {0x5001}, 0x73},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_QCIF_strong_dvs_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x00},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0xff},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xcf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x00},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0xd8},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x00},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xb0},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x20},
|
|
{OV9724_8BIT, {0x4909}, 0x14},
|
|
{OV9724_8BIT, {0x3811}, 0xe0},
|
|
{OV9724_8BIT, {0x3813}, 0x12},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x07},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x0385}, 0x05},
|
|
{OV9724_8BIT, {0x0387}, 0x03},
|
|
{OV9724_8BIT, {0x3821}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x3820}, 0xa1},
|
|
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},
|
|
{OV9724_8BIT, {0x4801}, 0x8f},
|
|
{OV9724_8BIT, {0x4814}, 0x2b},
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0xa2},
|
|
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},
|
|
{OV9724_8BIT, {0x5001}, 0x73},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_LOW_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x00},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0xff},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xcf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x00},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0xd0},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x00},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xa0},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x20},
|
|
{OV9724_8BIT, {0x4909}, 0x14},
|
|
{OV9724_8BIT, {0x3811}, 0xe0},
|
|
{OV9724_8BIT, {0x3813}, 0x12},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x07},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x0385}, 0x05},
|
|
{OV9724_8BIT, {0x0387}, 0x03},
|
|
{OV9724_8BIT, {0x3821}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x3820}, 0xa1},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},
|
|
{OV9724_8BIT, {0x4801}, 0x8f},
|
|
{OV9724_8BIT, {0x4814}, 0x2b},
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0xa2},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},
|
|
{OV9724_8BIT, {0x5001}, 0x73},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_QCIF_30fps[] = {
|
|
{OV9724_8BIT, {0x0344}, 0x00},/* Horizontal start - Hi */
|
|
{OV9724_8BIT, {0x0345}, 0x20},/* Horizontal start - Low */
|
|
{OV9724_8BIT, {0x0346}, 0x00},/* Vertical start - Hi */
|
|
{OV9724_8BIT, {0x0347}, 0x00},/* Vertical start - Low */
|
|
{OV9724_8BIT, {0x0348}, 0x04},/* Horizontal end - Hi */
|
|
{OV9724_8BIT, {0x0349}, 0xff},/* Horizontal end - Low */
|
|
{OV9724_8BIT, {0x034a}, 0x02},/* Vertical end - Hi */
|
|
{OV9724_8BIT, {0x034b}, 0xcf},/* Vertical end - Low */
|
|
{OV9724_8BIT, {0x034c}, 0x00},/* Image width - Hi */
|
|
{OV9724_8BIT, {0x034d}, 0xc0},/* Image width - Low */
|
|
{OV9724_8BIT, {0x034e}, 0x00},/* Image Height - Hi */
|
|
{OV9724_8BIT, {0x034f}, 0xa0},/* Image Height - Low */
|
|
{OV9724_8BIT, {0x4908}, 0x20},
|
|
{OV9724_8BIT, {0x4909}, 0x14},
|
|
{OV9724_8BIT, {0x3811}, 0xe0},
|
|
{OV9724_8BIT, {0x3813}, 0x12},
|
|
{OV9724_8BIT, {0x0340}, 0x03},/* Vertical length - Hi */
|
|
{OV9724_8BIT, {0x0341}, 0x68},/* Vertical length - Low */
|
|
{OV9724_8BIT, {0x0342}, 0x05},/* Horizontal length - Hi */
|
|
{OV9724_8BIT, {0x0343}, 0x60},/* Horizontal length - Low */
|
|
|
|
{OV9724_8BIT, {0x0301}, 0x0a},
|
|
{OV9724_8BIT, {0x0303}, 0x02},
|
|
{OV9724_8BIT, {0x0305}, 0x02},/* Pre-pll divider -Low */
|
|
{OV9724_8BIT, {0x0307}, 0x4b},/* Pll multi -Low */
|
|
{OV9724_8BIT, {0x0310}, 0x00},
|
|
|
|
{OV9724_8BIT, {0x0202}, 0x01},/* Integration time - Hi */
|
|
{OV9724_8BIT, {0x0203}, 0x80},/* Integration time - Low */
|
|
{OV9724_8BIT, {0x0205}, 0x3f},
|
|
|
|
{OV9724_8BIT, {0x0383}, 0x07},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x0385}, 0x05},
|
|
{OV9724_8BIT, {0x0387}, 0x03},
|
|
{OV9724_8BIT, {0x3821}, 0x01},
|
|
{OV9724_8BIT, {0x4501}, 0x09},
|
|
{OV9724_8BIT, {0x3820}, 0xa1},
|
|
|
|
{OV9724_8BIT, {0x4801}, 0x0f},
|
|
{OV9724_8BIT, {0x4801}, 0x8f},
|
|
{OV9724_8BIT, {0x4814}, 0x2b},
|
|
{OV9724_8BIT, {0x4307}, 0x3a},
|
|
{OV9724_8BIT, {0x370a}, 0xa2},
|
|
|
|
{OV9724_8BIT, {0x5000}, 0x06},
|
|
{OV9724_8BIT, {0x5001}, 0x73},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
/* TODO settings of preview/still/video will be updated with new use case */
|
|
struct ov9724_resolution ov9724_res_preview[] = {
|
|
{
|
|
.desc = "ov9724_960x720_30fps",
|
|
.regs = ov9724_960x720_30fps,
|
|
.width = 976,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "ov9724_720p_30fps",
|
|
.regs = ov9724_720p_30fps,
|
|
.width = 1296,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
|
|
};
|
|
#define N_RES_PREVIEW (ARRAY_SIZE(ov9724_res_preview))
|
|
|
|
struct ov9724_resolution ov9724_res_still[] = {
|
|
{
|
|
.desc = "ov9724_960x720_30fps",
|
|
.regs = ov9724_960x720_30fps,
|
|
.width = 976,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "ov9724_720p_30fps",
|
|
.regs = ov9724_720p_30fps,
|
|
.width = 1296,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
};
|
|
#define N_RES_STILL (ARRAY_SIZE(ov9724_res_still))
|
|
|
|
struct ov9724_resolution ov9724_res_video[] = {
|
|
{
|
|
.desc = "QCIF_30fps",
|
|
.regs = ov9724_QCIF_30fps,
|
|
.width = 192,
|
|
.height = 160,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 1,
|
|
.bin_factor_y = 1,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "VGA_strong_dvs_30fps",
|
|
.regs = ov9724_336_256_30fps,
|
|
.width = 336,
|
|
.height = 256,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "VGA_strong_dvs_30fps",
|
|
.regs = ov9724_368_304_30fps,
|
|
.width = 368,
|
|
.height = 304,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "VGA_strong_dvs_30fps",
|
|
.regs = ov9724_656_496_30fps,
|
|
.width = 656,
|
|
.height = 496,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "VGA_strong_dvs_30fps",
|
|
.regs = ov9724_736_496_30fps,
|
|
.width = 736,
|
|
.height = 496,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "ov9724_720p_30fps",
|
|
.regs = ov9724_720p_30fps,
|
|
.width = 1296,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x0560, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x0368, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
};
|
|
#define N_RES_VIDEO (ARRAY_SIZE(ov9724_res_video))
|
|
|
|
struct ov9724_resolution *ov9724_res = ov9724_res_preview;
|
|
static int N_RES = N_RES_PREVIEW;
|
|
|
|
|
|
static struct ov9724_reg const ov9724_suspend[] = {
|
|
{OV9724_8BIT, {0x0100}, 0x0},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_streaming[] = {
|
|
{OV9724_8BIT, {0x0100}, 0x1},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_param_hold[] = {
|
|
{OV9724_8BIT, {0x0104}, 0x1}, /* GROUPED_PARAMETER_HOLD */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9724_reg const ov9724_param_update[] = {
|
|
{OV9724_8BIT, {0x0104}, 0x0}, /* GROUPED_PARAMETER_HOLD */
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
/* init settings */
|
|
static struct ov9724_reg const ov9724_init_config[] = {
|
|
{OV9724_8BIT, {0x0103}, 0x01},/* Soft reset */
|
|
{OV9724_8BIT, {0x3210}, 0x43},
|
|
{OV9724_8BIT, {0x3606}, 0x75},
|
|
{OV9724_8BIT, {0x3705}, 0x41},
|
|
{OV9724_8BIT, {0x3601}, 0x34},
|
|
{OV9724_8BIT, {0x3607}, 0x94},
|
|
{OV9724_8BIT, {0x3608}, 0x20},
|
|
{OV9724_TOK_TERM, {0}, 0}
|
|
};
|
|
#endif
|