837 lines
26 KiB
C
837 lines
26 KiB
C
/*
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* Support for Sony OV9760 camera sensor.
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*
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* Copyright (c) 2010 Intel Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*/
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#ifndef __OV9760_H__
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#define __OV9760_H__
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#include <linux/atomisp_platform.h>
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#include <linux/atomisp.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/videodev2.h>
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#include <linux/v4l2-mediabus.h>
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#include <media/media-entity.h>
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#include <media/v4l2-chip-ident.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-subdev.h>
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#define OV9760_NAME "ov9760"
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#define V4L2_IDENT_OV9760 8245
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/* Defines for register writes and register array processing */
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#define OV9760_BYTE_MAX 32
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#define OV9760_SHORT_MAX 16
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#define I2C_MSG_LENGTH 0x2
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#define I2C_RETRY_COUNT 5
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#define OV9760_READ_MODE 0x3820
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#define OV9760_TEST_PATTERN_MODE 0x0601
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#define OV9760_HFLIP_BIT 0x1
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#define OV9760_VFLIP_BIT 0x2
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#define OV9760_VFLIP_OFFSET 1
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#define OV9760_IMG_ORIENTATION 0x0101
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#define I2C_RETRY_COUNT 5
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#define MAX_FMTS 1
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#define OV9760_PID_LOW 0x1
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#define OV9760_PID_HIGH 0x0
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#define OV9760_REV 0x2
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#define OV9760_MOD_ID 0x9760
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#define OV9760_RES_WIDTH_MAX 1456
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#define OV9760_RES_HEIGHT_MAX 1096
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#define ISP_PADDING_W 16
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#define ISP_PADDING_H 16
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#define OV9760_ISP_MAX_WIDTH (OV9760_RES_WIDTH_MAX - ISP_PADDING_W)
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#define OV9760_ISP_MAX_HEIGHT (OV9760_RES_HEIGHT_MAX - ISP_PADDING_H)
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#define OV9760_MAX_GAIN_VALUE 512
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#define OV9760_FOCAL_LENGTH_NUM 235 /*2.35mm*/
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#define OV9760_FOCAL_LENGTH_DEM 100
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#define OV9760_F_NUMBER_DEFAULT_NUM 240
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#define OV9760_F_NUMBER_DEM 100
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#define OV9760_COARSE_INTEGRATION_TIME_H 0x3500
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#define OV9760_COARSE_INTEGRATION_TIME_M 0x3501
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#define OV9760_COARSE_INTEGRATION_TIME_L 0x3502
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#define OV9760_GLOBAL_GAIN 0x350A
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#define OV9760_INTG_BUF_COUNT 2
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#define OV9760_VT_PIX_CLK_DIV 0x30b0
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#define OV9760_VT_SYS_CLK_DIV 0x30b1
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#define OV9760_PRE_PLL_CLK_DIV 0x0304
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#define OV9760_PLL_MULTIPLIER_H 0x30b2
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#define OV9760_PLL_MULTIPLIER_L 0x30b3
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#define OV9760_PLL_PLL1_PRE_DIV 0x30b4
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#define OV9760_MIPI_DIV 0x3010
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#define OV9760_OP_PIX_DIV 0x0300
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#define OV9760_OP_SYS_DIV 0x0302
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#define OV9760_FRAME_LENGTH_LINES 0x0340
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#define OV9760_COARSE_INTG_TIME_MIN 0x1004
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#define OV9760_FINE_INTG_TIME_MIN 0x1008
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#define OV9760_BIN_FACTOR_MAX 1
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#define OV9760_MCLK 192
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#define OV9760_HORIZONTAL_START_H 0x0344
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#define OV9760_VERTICAL_START_H 0x0346
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#define OV9760_HORIZONTAL_END_H 0x0348
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#define OV9760_VERTICAL_END_H 0x034a
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#define OV9760_HORIZONTAL_OUTPUT_SIZE_H 0x034c
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#define OV9760_VERTICAL_OUTPUT_SIZE_H 0x034e
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/*
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* focal length bits definition:
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* bits 31-16: numerator, bits 15-0: denominator
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*/
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#define OV9760_FOCAL_LENGTH_DEFAULT 0xA60064
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/*
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* current f-number bits definition:
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* bits 31-16: numerator, bits 15-0: denominator
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*/
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#define OV9760_F_NUMBER_DEFAULT 0x1200064
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/*
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* f-number range bits definition:
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* bits 31-24: max f-number numerator
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* bits 23-16: max f-number denominator
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* bits 15-8: min f-number numerator
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* bits 7-0: min f-number denominator
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*/
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#define OV9760_F_NUMBER_RANGE 0x1D0a1D0a
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#define v4l2_format_capture_type_entry(_width, _height, \
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_pixelformat, _bytesperline, _colorspace) \
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{\
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.type = V4L2_BUF_TYPE_VIDEO_CAPTURE,\
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.fmt.pix.width = (_width),\
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.fmt.pix.height = (_height),\
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.fmt.pix.pixelformat = (_pixelformat),\
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.fmt.pix.bytesperline = (_bytesperline),\
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.fmt.pix.colorspace = (_colorspace),\
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.fmt.pix.sizeimage = (_height)*(_bytesperline),\
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}
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#define s_output_format_entry(_width, _height, _pixelformat, \
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_bytesperline, _colorspace, _fps) \
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{\
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.v4l2_fmt = v4l2_format_capture_type_entry(_width, \
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_height, _pixelformat, _bytesperline, \
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_colorspace),\
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.fps = (_fps),\
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}
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#define s_output_format_reg_entry(_width, _height, _pixelformat, \
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_bytesperline, _colorspace, _fps, _reg_setting) \
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{\
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.s_fmt = s_output_format_entry(_width, _height,\
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_pixelformat, _bytesperline, \
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_colorspace, _fps),\
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.reg_setting = (_reg_setting),\
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}
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struct s_ctrl_id {
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struct v4l2_queryctrl qc;
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int (*s_ctrl)(struct v4l2_subdev *sd, u32 val);
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int (*g_ctrl)(struct v4l2_subdev *sd, u32 *val);
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};
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#define v4l2_queryctrl_entry_integer(_id, _name,\
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_minimum, _maximum, _step, \
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_default_value, _flags) \
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{\
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.id = (_id), \
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.type = V4L2_CTRL_TYPE_INTEGER, \
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.name = _name, \
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.minimum = (_minimum), \
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.maximum = (_maximum), \
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.step = (_step), \
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.default_value = (_default_value),\
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.flags = (_flags),\
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}
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#define v4l2_queryctrl_entry_boolean(_id, _name,\
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_default_value, _flags) \
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{\
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.id = (_id), \
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.type = V4L2_CTRL_TYPE_BOOLEAN, \
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.name = _name, \
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.minimum = 0, \
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.maximum = 1, \
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.step = 1, \
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.default_value = (_default_value),\
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.flags = (_flags),\
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}
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#define s_ctrl_id_entry_integer(_id, _name, \
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_minimum, _maximum, _step, \
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_default_value, _flags, \
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_s_ctrl, _g_ctrl) \
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{\
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.qc = v4l2_queryctrl_entry_integer(_id, _name,\
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_minimum, _maximum, _step,\
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_default_value, _flags), \
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.s_ctrl = _s_ctrl, \
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.g_ctrl = _g_ctrl, \
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}
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#define s_ctrl_id_entry_boolean(_id, _name, \
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_default_value, _flags, \
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_s_ctrl, _g_ctrl) \
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{\
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.qc = v4l2_queryctrl_entry_boolean(_id, _name,\
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_default_value, _flags), \
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.s_ctrl = _s_ctrl, \
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.g_ctrl = _g_ctrl, \
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}
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enum ov9760_tok_type {
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OV9760_8BIT = 0x0001,
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OV9760_16BIT = 0x0002,
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OV9760_RMW = 0x0010,
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OV9760_TOK_TERM = 0xf000, /* terminating token for reg list */
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OV9760_TOK_DELAY = 0xfe00, /* delay token for reg list */
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OV9760_TOK_MASK = 0xfff0
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};
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/*
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* If register address or register width is not 32 bit width,
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* user needs to convert it manually
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*/
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struct s_register_setting {
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u32 reg;
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u32 val;
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};
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struct s_output_format {
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struct v4l2_format v4l2_fmt;
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int fps;
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};
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/**
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* struct ov9760_fwreg - Fisare burst command
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* @type: FW burst or 8/16 bit register
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* @addr: 16-bit offset to register or other values depending on type
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* @val: data value for burst (or other commands)
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*
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* Define a structure for sensor register initialization values
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*/
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struct ov9760_fwreg {
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enum ov9760_tok_type type; /* value, register or FW burst string */
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u16 addr; /* target address */
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u32 val[8];
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};
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/**
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* struct ov9760_reg - MI sensor register format
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* @type: type of the register
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* @reg: 16-bit offset to register
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* @val: 8/16/32-bit register value
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*
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* Define a structure for sensor register initialization values
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*/
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struct ov9760_reg {
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enum ov9760_tok_type type;
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union {
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u16 sreg;
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struct ov9760_fwreg *fwreg;
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} reg;
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u32 val; /* @set value for read/mod/write, @mask */
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};
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#define to_ov9760_sensor(x) container_of(x, struct ov9760_device, sd)
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#define OV9760_MAX_WRITE_BUF_SIZE 30
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struct ov9760_write_buffer {
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u16 addr;
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u8 data[OV9760_MAX_WRITE_BUF_SIZE];
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};
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struct ov9760_write_ctrl {
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int index;
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struct ov9760_write_buffer buffer;
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};
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struct ov9760_device {
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struct v4l2_subdev sd;
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struct media_pad pad;
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struct v4l2_mbus_framefmt format;
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struct camera_sensor_platform_data *platform_data;
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struct mutex input_lock; /* serialize sensor's ioctl */
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u8 *otp_data;
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int fmt_idx;
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int status;
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int streaming;
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int power;
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int run_mode;
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int vt_pix_clk_freq_mhz;
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u16 sensor_id;
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u16 coarse_itg;
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u16 fine_itg;
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u16 gain;
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u16 pixels_per_line;
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u16 lines_per_frame;
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u8 fps;
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u8 res;
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u8 type;
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u8 sensor_revision;
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};
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struct ov9760_format_struct {
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u8 *desc;
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struct regval_list *regs;
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u32 pixelformat;
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};
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struct ov9760_resolution {
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u8 *desc;
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const struct ov9760_reg *regs;
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int res;
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int width;
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int height;
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int fps;
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unsigned short pixels_per_line;
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unsigned short lines_per_frame;
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u8 bin_factor_x;
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u8 bin_factor_y;
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bool used;
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u32 skip_frames;
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};
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struct ov9760_control {
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struct v4l2_queryctrl qc;
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int (*query)(struct v4l2_subdev *sd, s32 *value);
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int (*tweak)(struct v4l2_subdev *sd, int value);
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};
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/************************** settings for ov9760 *************************/
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static struct ov9760_reg const ov9760_1456x1096_30fps[] = {
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//1456x1096 30fps
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{OV9760_8BIT, {0x0340}, 0x04}, // ;VTS
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{OV9760_8BIT, {0x0341}, 0x7c}, // ;VTS, 03/05/2012"
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{OV9760_8BIT, {0x0342}, 0x06}, // ;HTS, 03/05/2012"
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{OV9760_8BIT, {0x0343}, 0xDC}, // ;;c8 ;HTS, 03/05/2012"
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{OV9760_8BIT, {0x0344}, 0x00}, // ;x_addr_start
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{OV9760_8BIT, {0x0345}, 0x08}, // ;x_addr_start, 03/01/2012"
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{OV9760_8BIT, {0x0346}, 0x00}, // ;y_addr_start
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{OV9760_8BIT, {0x0347}, 0x02}, // ;y_addr_start
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{OV9760_8BIT, {0x0348}, 0x05}, // ;x_addr_end
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{OV9760_8BIT, {0x0349}, 0xdf}, // ;x_addr_end, 03/01/2012"
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{OV9760_8BIT, {0x034a}, 0x04}, // ;y_addr_end
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{OV9760_8BIT, {0x034b}, 0x50}, // ;y_addr_end
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{OV9760_8BIT, {0x3811}, 0x04}, // ;x_offset
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{OV9760_8BIT, {0x3813}, 0x04}, // ;y_offset
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{OV9760_8BIT, {0x034c}, 0x05}, // ;x_output_size
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{OV9760_8BIT, {0x034d}, 0xb0}, // ;x_output_size
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{OV9760_8BIT, {0x034e}, 0x04}, // ;y_output_size
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{OV9760_8BIT, {0x034f}, 0x48}, // ;y_output_size
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{OV9760_8BIT, {0x0383}, 0x01}, // ;x_odd_inc
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{OV9760_8BIT, {0x0387}, 0x01}, // ;y_odd_inc
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{OV9760_8BIT, {0x3820}, 0x00}, // ;V bin
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{OV9760_8BIT, {0x3821}, 0x00}, // ;H bin
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{OV9760_8BIT, {0x30b0}, 0x0a}, // ;v05
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{OV9760_8BIT, {0x30b1}, 0x01}, //
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{OV9760_8BIT, {0x30b2}, 0x00}, //
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{OV9760_8BIT, {0x30b3}, 0x3F}, // ;PLL control
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{OV9760_8BIT, {0x30b4}, 0x02}, // ;PLL control
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{OV9760_8BIT, {0x3010}, 0x81}, //
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{OV9760_8BIT, {0x3090}, 0x02}, // ;PLL control
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{OV9760_8BIT, {0x3091}, 0x32}, // ;PLL control
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{OV9760_8BIT, {0x3092}, 0x02}, // ;
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{OV9760_8BIT, {0x3093}, 0x02}, // ;PLL control
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{OV9760_8BIT, {0x3094}, 0x00}, // ;PLL control
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{OV9760_TOK_TERM, {0}, 0}
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};
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static struct ov9760_reg const ov9760_1296x736_30fps[] = {
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// 1296x736 30fps
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{OV9760_8BIT, {0x0340}, 0x04}, // ;VTS
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{OV9760_8BIT, {0x0341}, 0x7c}, // ;VTS, 03/05/2012"
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{OV9760_8BIT, {0x0342}, 0x06}, // ;HTS, 03/05/2012"
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{OV9760_8BIT, {0x0343}, 0xDC}, // ;HTS, 03/05/2012"
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{OV9760_8BIT, {0x0344}, 0x00}, // ;x_addr_start
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{OV9760_8BIT, {0x0345}, 0x08}, // ;x_addr_start, 03/01/2012"
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{OV9760_8BIT, {0x0346}, 0x00}, // ;y_addr_start
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{OV9760_8BIT, {0x0347}, 0x02}, // ;y_addr_start
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{OV9760_8BIT, {0x0348}, 0x05}, // ;x_addr_end
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{OV9760_8BIT, {0x0349}, 0xdf}, // ;x_addr_end, 03/01/2012"
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{OV9760_8BIT, {0x034a}, 0x04}, // ;y_addr_end
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{OV9760_8BIT, {0x034b}, 0x50}, // ;y_addr_end
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{OV9760_8BIT, {0x3811}, 0x04}, // ;x_offset
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{OV9760_8BIT, {0x3813}, 0x04}, // ;y_offset
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{OV9760_8BIT, {0x034c}, 0x05}, // ;x_output_size
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{OV9760_8BIT, {0x034d}, 0x10}, // ;x_output_size
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{OV9760_8BIT, {0x034e}, 0x02}, // ;y_output_size
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{OV9760_8BIT, {0x034f}, 0xe0}, // ;y_output_size
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{OV9760_8BIT, {0x0383}, 0x01}, // ;x_odd_inc
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{OV9760_8BIT, {0x0387}, 0x01}, // ;y_odd_inc
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{OV9760_8BIT, {0x3820}, 0x00}, // ;V bin
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{OV9760_8BIT, {0x3821}, 0x00}, // ;H bin
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{OV9760_8BIT, {0x30b0}, 0x0a}, // ;v05
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{OV9760_8BIT, {0x30b1}, 0x01}, //
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{OV9760_8BIT, {0x30b2}, 0x00}, //
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{OV9760_8BIT, {0x30b3}, 0x3F}, // ;PLL control
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{OV9760_8BIT, {0x30b4}, 0x02}, // ;PLL control
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{OV9760_8BIT, {0x3010}, 0x81}, //
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{OV9760_8BIT, {0x3090}, 0x02}, // ;PLL control
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{OV9760_8BIT, {0x3091}, 0x32}, // ;PLL control
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{OV9760_8BIT, {0x3092}, 0x02}, // ;
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{OV9760_8BIT, {0x3093}, 0x02}, // ;PLL control
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{OV9760_8BIT, {0x3094}, 0x00}, // ;PLL control
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{OV9760_TOK_TERM, {0}, 0}
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};
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static struct ov9760_reg const ov9760_1216x736_30fps[] = {
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// 1216x736 30fps
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{OV9760_8BIT, {0x0340}, 0x04}, // ;VTS
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{OV9760_8BIT, {0x0341}, 0x7c}, // ;VTS, 03/05/2012"
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{OV9760_8BIT, {0x0342}, 0x06}, // ;HTS, 03/05/2012"
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{OV9760_8BIT, {0x0343}, 0xDC}, // ;HTS, 03/05/2012"
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{OV9760_8BIT, {0x0344}, 0x00}, // ;x_addr_start
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{OV9760_8BIT, {0x0345}, 0x08}, // ;x_addr_start, 03/01/2012"
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{OV9760_8BIT, {0x0346}, 0x00}, // ;y_addr_start
|
|
{OV9760_8BIT, {0x0347}, 0x02}, // ;y_addr_start
|
|
{OV9760_8BIT, {0x0348}, 0x05}, // ;x_addr_end
|
|
{OV9760_8BIT, {0x0349}, 0xdf}, // ;x_addr_end, 03/01/2012"
|
|
{OV9760_8BIT, {0x034a}, 0x04}, // ;y_addr_end
|
|
{OV9760_8BIT, {0x034b}, 0x50}, // ;y_addr_end
|
|
{OV9760_8BIT, {0x3811}, 0x04}, // ;x_offset
|
|
{OV9760_8BIT, {0x3813}, 0x04}, // ;y_offset
|
|
{OV9760_8BIT, {0x034c}, 0x04}, // ;x_output_size
|
|
{OV9760_8BIT, {0x034d}, 0xc0}, // ;x_output_size
|
|
{OV9760_8BIT, {0x034e}, 0x02}, // ;y_output_size
|
|
{OV9760_8BIT, {0x034f}, 0xe0}, // ;y_output_size
|
|
{OV9760_8BIT, {0x0383}, 0x01}, // ;x_odd_inc
|
|
{OV9760_8BIT, {0x0387}, 0x01}, // ;y_odd_inc
|
|
{OV9760_8BIT, {0x3820}, 0x00}, // ;V bin
|
|
{OV9760_8BIT, {0x3821}, 0x00}, // ;H bin
|
|
|
|
{OV9760_8BIT, {0x30b0}, 0x0a}, // ;v05
|
|
{OV9760_8BIT, {0x30b1}, 0x01}, //
|
|
{OV9760_8BIT, {0x30b2}, 0x00}, //
|
|
{OV9760_8BIT, {0x30b3}, 0x3F}, // ;PLL control
|
|
{OV9760_8BIT, {0x30b4}, 0x02}, // ;PLL control
|
|
{OV9760_8BIT, {0x3010}, 0x81}, //
|
|
|
|
{OV9760_8BIT, {0x3090}, 0x02}, // ;PLL control
|
|
{OV9760_8BIT, {0x3091}, 0x32}, // ;PLL control
|
|
{OV9760_8BIT, {0x3092}, 0x02}, // ;
|
|
{OV9760_8BIT, {0x3093}, 0x02}, // ;PLL control
|
|
{OV9760_8BIT, {0x3094}, 0x00}, // ;PLL control
|
|
|
|
{OV9760_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9760_reg const ov9760_896x736_30fps[] = {
|
|
//896x736 30fps
|
|
|
|
{OV9760_8BIT, {0x0340}, 0x04}, // ;VTS
|
|
{OV9760_8BIT, {0x0341}, 0x7c}, // ;VTS, 03/05/2012"
|
|
{OV9760_8BIT, {0x0342}, 0x06}, // ;HTS, 03/05/2012"
|
|
{OV9760_8BIT, {0x0343}, 0xDC}, // ;HTS, 03/05/2012"
|
|
{OV9760_8BIT, {0x0344}, 0x00}, // ;x_addr_start
|
|
{OV9760_8BIT, {0x0345}, 0x08}, // ;x_addr_start, 03/01/2012"
|
|
{OV9760_8BIT, {0x0346}, 0x00}, // ;y_addr_start
|
|
{OV9760_8BIT, {0x0347}, 0x02}, // ;y_addr_start
|
|
{OV9760_8BIT, {0x0348}, 0x05}, // ;x_addr_end
|
|
{OV9760_8BIT, {0x0349}, 0xdf}, // ;x_addr_end, 03/01/2012"
|
|
{OV9760_8BIT, {0x034a}, 0x04}, // ;y_addr_end
|
|
{OV9760_8BIT, {0x034b}, 0x50}, // ;y_addr_end
|
|
{OV9760_8BIT, {0x3811}, 0x04}, // ;x_offset
|
|
{OV9760_8BIT, {0x3813}, 0x04}, // ;y_offset
|
|
{OV9760_8BIT, {0x034c}, 0x03}, // ;x_output_size
|
|
{OV9760_8BIT, {0x034d}, 0x80}, // ;x_output_size
|
|
{OV9760_8BIT, {0x034e}, 0x02}, // ;y_output_size
|
|
{OV9760_8BIT, {0x034f}, 0xe0}, // ;y_output_size
|
|
{OV9760_8BIT, {0x0383}, 0x01}, // ;x_odd_inc
|
|
{OV9760_8BIT, {0x0387}, 0x01}, // ;y_odd_inc
|
|
{OV9760_8BIT, {0x3820}, 0x00}, // ;V bin
|
|
{OV9760_8BIT, {0x3821}, 0x00}, // ;H bin
|
|
|
|
{OV9760_8BIT, {0x30b0}, 0x0a}, // ;v05
|
|
{OV9760_8BIT, {0x30b1}, 0x01}, //
|
|
{OV9760_8BIT, {0x30b2}, 0x00}, //
|
|
{OV9760_8BIT, {0x30b3}, 0x3F}, // ;PLL control
|
|
{OV9760_8BIT, {0x30b4}, 0x02}, // ;PLL control
|
|
{OV9760_8BIT, {0x3010}, 0x81}, //
|
|
|
|
{OV9760_8BIT, {0x3090}, 0x02}, // ;PLL control
|
|
{OV9760_8BIT, {0x3091}, 0x32}, // ;PLL control
|
|
{OV9760_8BIT, {0x3092}, 0x02}, // ;
|
|
{OV9760_8BIT, {0x3093}, 0x02}, // ;PLL control
|
|
{OV9760_8BIT, {0x3094}, 0x00}, // ;PLL control
|
|
|
|
{OV9760_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
/* TODO settings of preview/still/video will be updated with new use case */
|
|
struct ov9760_resolution ov9760_res_preview[] = {
|
|
{
|
|
.desc = "ov9760_1456x1096_30fps",
|
|
.regs = ov9760_1456x1096_30fps,
|
|
.width = 1456,
|
|
.height = 1096,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
{
|
|
.desc = "ov9760_1296x736_30fps",
|
|
.regs = ov9760_1296x736_30fps,
|
|
.width = 1296,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
#if 0
|
|
{
|
|
.desc = "ov9760_1216x736_30fps",
|
|
.regs = ov9760_1216x736_30fps,
|
|
.width = 1216,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
#endif
|
|
{
|
|
.desc = "ov9760_896x736_30fps",
|
|
.regs = ov9760_896x736_30fps,
|
|
.width = 896,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
};
|
|
#define N_RES_PREVIEW (ARRAY_SIZE(ov9760_res_preview))
|
|
|
|
struct ov9760_resolution ov9760_res_still[] = {
|
|
{
|
|
.desc = "ov9760_1456x1096_30fps",
|
|
.regs = ov9760_1456x1096_30fps,
|
|
.width = 1456,
|
|
.height = 1096,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
{
|
|
.desc = "ov9760_1296x736_30fps",
|
|
.regs = ov9760_1296x736_30fps,
|
|
.width = 1296,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
#if 0
|
|
{
|
|
.desc = "ov9760_1216x736_30fps",
|
|
.regs = ov9760_1216x736_30fps,
|
|
.width = 1216,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
#endif
|
|
{
|
|
.desc = "ov9760_896x736_30fps",
|
|
.regs = ov9760_896x736_30fps,
|
|
.width = 896,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 1
|
|
},
|
|
};
|
|
#define N_RES_STILL (ARRAY_SIZE(ov9760_res_still))
|
|
|
|
struct ov9760_resolution ov9760_res_video[] = {
|
|
{
|
|
.desc = "ov9760_1456x1096_30fps",
|
|
.regs = ov9760_1456x1096_30fps,
|
|
.width = 1456,
|
|
.height = 1096,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
{
|
|
.desc = "ov9760_1296x736_30fps",
|
|
.regs = ov9760_1296x736_30fps,
|
|
.width = 1296,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
#if 0
|
|
{
|
|
.desc = "ov9760_1216x736_30fps",
|
|
.regs = ov9760_1216x736_30fps,
|
|
.width = 1216,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
#endif
|
|
{
|
|
.desc = "ov9760_896x736_30fps",
|
|
.regs = ov9760_896x736_30fps,
|
|
.width = 896,
|
|
.height = 736,
|
|
.fps = 30,
|
|
.pixels_per_line = 0x06dc, /* consistent with regs arrays */
|
|
.lines_per_frame = 0x047c, /* consistent with regs arrays */
|
|
.bin_factor_x = 0,
|
|
.bin_factor_y = 0,
|
|
.used = 0,
|
|
.skip_frames = 0,
|
|
},
|
|
};
|
|
#define N_RES_VIDEO (ARRAY_SIZE(ov9760_res_video))
|
|
|
|
struct ov9760_resolution *ov9760_res = ov9760_res_preview;
|
|
static int N_RES = N_RES_PREVIEW;
|
|
|
|
|
|
static struct ov9760_reg const ov9760_suspend[] = {
|
|
{OV9760_8BIT, {0x0100}, 0x0},
|
|
{OV9760_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9760_reg const ov9760_streaming[] = {
|
|
{OV9760_8BIT, {0x0100}, 0x1},
|
|
{OV9760_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9760_reg const ov9760_param_hold[] = {
|
|
{OV9760_8BIT, {0x3208}, 0x00}, /* GROUPED_PARAMETER_HOLD */
|
|
{OV9760_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
static struct ov9760_reg const ov9760_param_update[] = {
|
|
{OV9760_8BIT, {0x3208}, 0x10}, /* GROUPED_PARAMETER_HOLD */
|
|
{OV9760_8BIT, {0x3208}, 0xA0},
|
|
{OV9760_TOK_TERM, {0}, 0}
|
|
};
|
|
|
|
/* init settings */
|
|
static struct ov9760_reg const ov9760_init_config[] = {
|
|
//Common settings for all test items
|
|
{OV9760_8BIT, {0x0103}, 0x01}, //S/W reset
|
|
// insert 10ms delay here
|
|
{OV9760_TOK_DELAY, {0}, 0x0a}, //delay 10ms
|
|
{OV9760_8BIT, {0x0340}, 0x04}, //VTS
|
|
{OV9760_8BIT, {0x0341}, 0x7C}, //VTS, 03/05/2012"
|
|
{OV9760_8BIT, {0x0342}, 0x06}, //HTS, 03/05/2012"
|
|
{OV9760_8BIT, {0x0343}, 0xDC}, //HTS, 03/05/2012"
|
|
{OV9760_8BIT, {0x0344}, 0x00}, //x_addr_start
|
|
{OV9760_8BIT, {0x0345}, 0x08}, //x_addr_start, 03/01/2012"
|
|
{OV9760_8BIT, {0x0346}, 0x00}, //y_addr_start
|
|
{OV9760_8BIT, {0x0347}, 0x02}, //y_addr_start
|
|
{OV9760_8BIT, {0x0348}, 0x05}, //x_addr_end
|
|
{OV9760_8BIT, {0x0349}, 0xdf}, //x_addr_end, 03/01/2012"
|
|
{OV9760_8BIT, {0x034a}, 0x04}, //y_addr_end
|
|
{OV9760_8BIT, {0x034b}, 0x50}, //y_addr_end
|
|
{OV9760_8BIT, {0x3811}, 0x04}, //x_offset
|
|
{OV9760_8BIT, {0x3813}, 0x04}, //y_offset
|
|
{OV9760_8BIT, {0x034c}, 0x05}, //x_output_size
|
|
{OV9760_8BIT, {0x034d}, 0xb0}, //x_output_size
|
|
{OV9760_8BIT, {0x034e}, 0x04}, //y_output_size
|
|
{OV9760_8BIT, {0x034f}, 0x48}, //y_output_size
|
|
{OV9760_8BIT, {0x0383}, 0x01}, //x_odd_inc
|
|
{OV9760_8BIT, {0x0387}, 0x01}, //y_odd_inc
|
|
{OV9760_8BIT, {0x3820}, 0x00}, //V bin
|
|
{OV9760_8BIT, {0x3821}, 0x00}, //H bin
|
|
{OV9760_8BIT, {0x3660}, 0x80}, //Analog control, 03/01/2012
|
|
{OV9760_8BIT, {0x3680}, 0xf4}, //Analog control, 03/01/2012
|
|
{OV9760_8BIT, {0x0100}, 0x00}, //Mode select - stop streaming
|
|
{OV9760_8BIT, {0x0101}, 0x01}, //Orientation
|
|
{OV9760_8BIT, {0x3002}, 0x80}, //IO control
|
|
{OV9760_8BIT, {0x3012}, 0x08}, //MIPI control
|
|
{OV9760_8BIT, {0x3014}, 0x04}, //MIPI control
|
|
{OV9760_8BIT, {0x3022}, 0x02}, //Analog control
|
|
{OV9760_8BIT, {0x3023}, 0x0f}, //Analog control
|
|
{OV9760_8BIT, {0x3080}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x3090}, 0x02}, //PLL control
|
|
{OV9760_8BIT, {0x3091}, 0x32}, //PLL control
|
|
{OV9760_8BIT, {0x3092}, 0x02}, //
|
|
{OV9760_8BIT, {0x3093}, 0x02}, //PLL control
|
|
{OV9760_8BIT, {0x3094}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x3095}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x3096}, 0x01}, //PLL control
|
|
{OV9760_8BIT, {0x3097}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x3098}, 0x04}, //PLL control
|
|
{OV9760_8BIT, {0x3099}, 0x14}, //PLL control
|
|
{OV9760_8BIT, {0x309a}, 0x03}, //PLL control
|
|
{OV9760_8BIT, {0x309c}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x309d}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x309e}, 0x01}, //PLL control
|
|
{OV9760_8BIT, {0x309f}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x30a2}, 0x01}, //PLL control
|
|
{OV9760_8BIT, {0x30b0}, 0x0a}, //v05
|
|
{OV9760_8BIT, {0x30b3}, 0x3F}, //PLL control
|
|
{OV9760_8BIT, {0x30b4}, 0x02}, //PLL control
|
|
{OV9760_8BIT, {0x30b5}, 0x00}, //PLL control
|
|
{OV9760_8BIT, {0x3503}, 0x27}, //Auto gain/exposure, //set as 0x17 become manual mode"
|
|
{OV9760_8BIT, {0x3509}, 0x10}, //AEC control
|
|
{OV9760_8BIT, {0x3600}, 0x7c}, //Analog control
|
|
{OV9760_8BIT, {0x3621}, 0xb8}, //v04
|
|
{OV9760_8BIT, {0x3622}, 0x23}, //Analog control
|
|
{OV9760_8BIT, {0x3631}, 0xe2}, //Analog control
|
|
{OV9760_8BIT, {0x3634}, 0x03}, //Analog control
|
|
{OV9760_8BIT, {0x3662}, 0x14}, //Analog control
|
|
{OV9760_8BIT, {0x366b}, 0x03}, //Analog control
|
|
{OV9760_8BIT, {0x3682}, 0x82}, //Analog control
|
|
{OV9760_8BIT, {0x3705}, 0x20}, //
|
|
{OV9760_8BIT, {0x3708}, 0x64}, //
|
|
{OV9760_8BIT, {0x371b}, 0x60}, //Sensor control
|
|
{OV9760_8BIT, {0x3732}, 0x40}, //Sensor control
|
|
{OV9760_8BIT, {0x3745}, 0x00}, //Sensor control
|
|
{OV9760_8BIT, {0x3746}, 0x18}, //Sensor control
|
|
{OV9760_8BIT, {0x3780}, 0x2a}, //Sensor control
|
|
{OV9760_8BIT, {0x3781}, 0x8c}, //Sensor control
|
|
{OV9760_8BIT, {0x378f}, 0xf5}, //Sensor control
|
|
{OV9760_8BIT, {0x3823}, 0x37}, //Internal timing control
|
|
{OV9760_8BIT, {0x383d}, 0x88}, //Adjust starting black row for BLC calibration to avoid FIFO empty condition, 03/01/2012"
|
|
{OV9760_8BIT, {0x4000}, 0x23}, //BLC control, 03/06/2012, disable DCBLC for production test"
|
|
{OV9760_8BIT, {0x4001}, 0x04}, //BLC control
|
|
{OV9760_8BIT, {0x4002}, 0x45}, //BLC control
|
|
{OV9760_8BIT, {0x4004}, 0x08}, //BLC control
|
|
{OV9760_8BIT, {0x4005}, 0x40}, //BLC for flashing
|
|
{OV9760_8BIT, {0x4006}, 0x40}, //BLC control
|
|
{OV9760_8BIT, {0x4009}, 0x40}, //BLC
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{OV9760_8BIT, {0x404F}, 0x8F}, //BLC control to improve black level fluctuation, 03/01/2012"
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{OV9760_8BIT, {0x4058}, 0x44}, //BLC control
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{OV9760_8BIT, {0x4101}, 0x32}, //BLC control
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{OV9760_8BIT, {0x4102}, 0xa4}, //BLC control
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{OV9760_8BIT, {0x4520}, 0xb0}, //For full res
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{OV9760_8BIT, {0x4580}, 0x08}, //Bypassing HDR gain latch, 03/01/2012"
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{OV9760_8BIT, {0x4582}, 0x00}, //Bypassing HDR gain latch, 03/01/2012"
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{OV9760_8BIT, {0x4307}, 0x30}, //MIPI control
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{OV9760_8BIT, {0x4605}, 0x00}, //VFIFO control v04 updated
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{OV9760_8BIT, {0x4608}, 0x02}, //VFIFO control v04 updated
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{OV9760_8BIT, {0x4609}, 0x00}, //VFIFO control v04 updated
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{OV9760_8BIT, {0x4801}, 0x0f}, //MIPI control
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{OV9760_8BIT, {0x4819}, 0xB6}, //MIPI control v05 updated
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{OV9760_8BIT, {0x4837}, 0x21}, //MIPI control
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{OV9760_8BIT, {0x4906}, 0xff}, //Internal timing control
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{OV9760_8BIT, {0x4d00}, 0x04}, //Temperature sensor
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{OV9760_8BIT, {0x4d01}, 0x4b}, //Temperature sensor
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{OV9760_8BIT, {0x4d02}, 0xfe}, //Temperature sensor
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{OV9760_8BIT, {0x4d03}, 0x09}, //Temperature sensor
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{OV9760_8BIT, {0x4d04}, 0x1e}, //Temperature sensor
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{OV9760_8BIT, {0x4d05}, 0xb7}, //Temperature sensor
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{OV9760_8BIT, {0x5000}, 0x06}, //Turn off LSC
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{OV9760_8BIT, {0x5180}, 0x04}, //Manual White Balance
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{OV9760_8BIT, {0x5181}, 0x00},
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{OV9760_8BIT, {0x5182}, 0x04},
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{OV9760_8BIT, {0x5183}, 0x00},
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{OV9760_8BIT, {0x5184}, 0x04},
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{OV9760_8BIT, {0x5185}, 0x00},
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{OV9760_8BIT, {0x5186}, 0x01},
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{OV9760_8BIT, {0x5781}, 0x17},
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{OV9760_8BIT, {0x5792}, 0x00},
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{OV9760_8BIT, {0x5002}, 0x41},
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{OV9760_8BIT, {0x3503}, 0x07},
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{OV9760_8BIT, {0x3501}, 0x07},
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{OV9760_8BIT, {0x3502}, 0xff},
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{OV9760_8BIT, {0x4003}, 0x81},
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{OV9760_TOK_TERM, {0}, 0}
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};
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static int
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ov9760_write_reg(struct i2c_client *client, u16 data_length, u16 reg, u16 val);
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static int ov9760_read_reg(struct i2c_client *client,
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u16 data_length, u16 reg, u16 *val);
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static int ov9760_s_stream(struct v4l2_subdev *sd, int enable);
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#endif
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