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Add debug trace

This commit is contained in:
Maurizio Porrato 2020-01-24 08:34:28 +00:00
parent a785d2eb12
commit feeae16d5b
1 changed files with 11 additions and 0 deletions
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11
dsim.c
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@ -19,6 +19,7 @@ uint16_t lit; /* temporary storage for literal operands */
bool skip_next; bool skip_next;
uint64_t ticks; uint64_t ticks;
bool running; bool running;
bool trace;
bool intq_en; bool intq_en;
#define MAX_INTQ_SIZE 256 #define MAX_INTQ_SIZE 256
uint16_t intq[MAX_INTQ_SIZE]; uint16_t intq[MAX_INTQ_SIZE];
@ -75,6 +76,7 @@ void reset()
skip_next = false; skip_next = false;
ticks = 0; ticks = 0;
trace = false;
running = true; running = true;
} }
@ -100,6 +102,12 @@ void debug_irqh()
case 0x0002: case 0x0002:
dump_ram(ry, rx); dump_ram(ry, rx);
break; break;
case 0x0004:
trace = false;
break;
case 0x0005:
trace = true;
break;
case 0xffff: case 0xffff:
rx = EMU_ID; rx = EMU_ID;
ry = EMU_VER; ry = EMU_VER;
@ -496,6 +504,9 @@ void next()
} }
} }
if (trace)
dumpregs();
ir = ram[rpc++]; ir = ram[rpc++];
opcode = ir & 0x001f; opcode = ir & 0x001f;